A solar cell, a manufacturing method, and a photovoltaic module are provided. In one aspect, an solar cell includes a silicon substrate, a first transport layer, and a carrier collection layer. The silicon substrate has a first surface and a second surface opposite to each other. The first transport layer is arranged on at least one of the first surface and the second surface. The first transport layer includes a polysilicon layer having an amorphous silicon region. The amorphous silicon region is arranged on at least a part of a surface of the polysilicon layer away from the silicon substrate. The carrier collection layer is arranged on the first transport layer, and at least a part of the carrier collection layer is in contact with the amorphous silicon region.

A method for treating a stack, the stack including a substrate of crystalline silicon, a first passivation layer of hydrogenated amorphous silicon, disposed on a first face of the substrate; and a first layer of n-doped amorphous silicon, disposed on the first passivation layer; the method including a step of exposing the stack to electromagnetic radiation emitted by an electromagnetic radiation source, the first face of the substrate pointing to the electromagnetic radiation source, the electromagnetic radiation having at least one first wavelength of between 300 nm and 550 nm and at least one second wavelength of between 550 nm and 1100 nm.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type layouts and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is on a first thin dielectric layer on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is on a second thin dielectric layer on the back surface of the substrate. The second polycrystalline silicon emitter region has a vertical thickness less than a vertical thickness of the first polycrystalline silicon emitter region.