A sensor includes an array of optically active pixels disposed on a semiconductor die. The array of optically active pixels includes at least one pixel (P1) configured to detect short wavelength infrared radiation (SWIR), and at least one pixel (P2) configured to detect visible light incident on the sensor.

An infrared photodiode includes a first electrode including a reflective layer, a second electrode facing the first electrode, and a photoelectric conversion layer between the first electrode and the second electrode. The photoelectric conversion layer includes an infrared absorbing material. A maximum absorption wavelength of the infrared absorbing material in a solution state is greater than about 700 nm and less than or equal to about 950 nm. The infrared photodiode is configured to exhibit an external quantum efficiency (EQE) spectrum in a wavelength region of greater than or equal to about 1000 nm.

An image sensor pixel is provided that includes a semiconductor substrate having a front surface and a back surface, a photosensitive element formed in the front surface of the semiconductor substrate and configured to sense light in a first range of wavelengths, an interconnect stack formed on the front surface of the semiconductor substrate, and a phase change resistor formed in the interconnect stack and configured to sense light in a second range of wavelengths different than the first range of wavelengths. The phase change resistor can include phase change material embedded within one or more resonant cavities interposed between a transparent conductor and a reflective conductor in the interconnect stack. Incoming light can enter through the back surface of the substrate and can be reflected internally within the one or more resonant cavities, resulting in the generation of heat and causing the phase change material to conduct current.

The present disclosure relates to a method for manufacturing a pixel that includes depositing an insulating layer on an exposed face of an interconnect structure of an integrated circuit, the interconnect structure having a conductive element flush with said exposed face; etching an opening passing through the insulating layer to the conductive element; depositing an electrode layer on and in contact with the conductive element and the insulating layer; performing chemical mechanical planarization up to the insulating layer, a portion of the electrode layer left in place in the opening forming an electrode; and depositing a film configured to convert photons into electron-hole pairs when a ray at an operating wavelength of the pixel reaches the pixel.

A method includes following steps. A first III-V compound layer is epitaxially grown over a semiconductive substrate. The first III-V compound layer has an energy gap in a gradient distribution. A source/drain contact is formed over the first III-V compound layer. A gate structure is formed over the first III-V compound layer.

An infrared sensor includes a first semiconductor substrate, a second semiconductor substrate, a sealing frame, and a first connection. The first semiconductor substrate includes a first main surface and an infrared detection element. The second semiconductor substrate includes a second main surface and a signal processing circuit. The sealing frame surrounds an internal space with the first main surface, the infrared detection element, and the second main surface. The first connection electrically connects the infrared detection element and the signal processing circuit. The internal space is hermetically sealed by the first main surface, the infrared detection element, the second main surface, and the sealing frame. Each of the sealing frame and the first connection is sandwiched between the first main surface and the second main surface.