H01L21/203

Integrated method for wafer outgassing reduction

Implementations disclosed herein relate to methods for controlling substrate outgassing. In one implementation, the method includes removing oxides from an exposed surface of a substrate in an inductively coupled plasma chamber, forming an epitaxial layer on the exposed surface of the substrate in an epitaxial deposition chamber, and performing an outgassing control of the substrate by subjecting the substrate to a first plasma formed from a first etch precursor in the inductively coupled plasma chamber at a first chamber pressure, wherein the first etch precursor comprises a hydrogen-containing precursor, a chlorine-containing precursor, and an inert gas, and subjecting the substrate to a second plasma formed from a second etch precursor in the inductively coupled plasma chamber at a second chamber pressure that is higher than the first chamber pressure, wherein the second etch precursor comprises a hydrogen-containing precursor and an inert gas.

PHOTOELECTRIC CONVERSION DEVICE, METHOD OF MANUFACTURING THE SAME, AND CAMERA

A photoelectric conversion device has a silicon substrate which includes a first portion configured to perform photoelectric conversion, and a second portion which is arranged farther apart from a light receiving surface of the silicon substrate than the first portion and contains carbon. A first peak concentration as a carbon peak concentration in the second portion is not less than 1?10.sup.18 [atoms/cm.sup.3] and not more than 1?10.sup.20 [atoms/cm.sup.3], and a second peak concentration as an oxygen peak concentration in the second portion is not less than 1/1000 and not more than 1/10 of the first peak concentration.

Method of doped germanium formation

Implementations described herein generally relate to methods and systems for depositing layer on substrates, and more specifically, to methods for forming boron or gallium-doped germanium on silicon-containing surfaces. In one implementation, a method of processing a substrate is provided. The method comprises exposing a substrate having an exposed silicon-germanium surface and an exposed dielectric surface to a pre-treatment process, selectively depositing a boron-doped or a gallium-doped layer on the exposed silicon-germanium surface and exposing the substrate to a post-treatment process.

PROCESSING DEVICE AND COLLIMATOR

According to one embodiment, a processing device comprises a substance arrangement part, a generating source arrangement part, and a collimator. A substance is arranged on the substance arrangement part. The generating source arrangement part is arranged at a position separated away from the substance arrangement part. A particle generating source that is able to emit a particle to the substance is arranged on the generating source arrangement part. The collimator is configured to be arranged between the substance arrangement part and the generating source arrangement part. The collimator includes: a frame; and a first rectifying part that includes a plurality of first walls and a plurality of first through holes formed with the first walls and extending in a first direction from the generating source arrangement part toward the substance arrangement part, the collimator configured to be removably attached to the frame.

BONDING DEVICE FOR CHIP ON FILM AND DISPLAY PANEL AND BONDING METHOD FOR THE SAME
20180053664 · 2018-02-22 ·

The embodiments of the present disclosure provide a bonding device for a chip on film and a display panel and a bonding method for the same. The bonding device includes: a bearing stage having a horizontal bearing surface for supporting at least one row of display panels, wherein one row of the at least one row of display panels has a row of first bonding regions; a grasping unit disposed above the bearing stage and configured to grasp at least a partial area of the entire chip on film so that a row of second bonding regions of the entire chip on film is horizontally located above the one row of display panels; and a bonding unit configured to bond the row of second bonding regions which has been aligned with the row of first bonding regions to the row of first bonding regions.

Integrated photonics including germanium

A photonic structure can include in one aspect one or more waveguides formed by patterning of waveguiding material adapted to propagate light energy. Such waveguiding material may include one or more of silicon (single-, poly-, or non-crystalline) and silicon nitride.

Method of enabling seamless cobalt gap-fill

Methods for depositing a metal layer in a feature definition of a semiconductor device are provided. In one implementation, a method for depositing a metal layer for forming a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a metal layer on a substrate and annealing the metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the metal layer on the substrate, exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process until a predetermined thickness of the metal layer is achieved.

Method of forming a trench in a semiconductor device
09583605 · 2017-02-28 · ·

A method to make a semiconductor device, a first SiO.sub.2 layer and a first Si.sub.3N.sub.4 layer are sequentially formed on the semiconductor substrate. The first SiO.sub.2 layer and the first Si.sub.3N.sub.4 layer are then patterned as etching mask to form a trench in a semiconductor substrate by a trench etching process. After this, a second SiO.sub.2 layer and a second Si.sub.3N.sub.4 layer are formed conformal onto the substrate. Anisotropic etching is then performed to remove the second Si.sub.3N.sub.4 and second SiO.sub.2 layer except on the trench sidewall. Then a thermal oxidation process is done to grow oxide only in trench bottom and at trench top corner. The radius of curvature of trench bottom and trench top corner is increased at the same time by this thermal oxidation process.