A semiconductor device may include a lower wiring pattern extending in a first direction, a lower insulating layer disposed on the lower wiring pattern, a channel pattern disposed on the lower insulating layer, a gate electrode surrounding the channel pattern and extending in a second direction intersecting the first direction, a first source/drain pattern disposed on a first side surface of the channel pattern, wherein the first source/drain pattern comprises a first lower region and a first middle region, and the first lower region is disposed closer to the lower insulating layer than the first middle region, a second source/drain pattern disposed on a second side surface of the channel pattern. The second source/drain pattern comprises a second lower region and a second middle region, and the second lower region is disposed closer to the lower insulating layer than the second middle region. The semiconductor device further include a connection pattern formed through the lower insulating layer and connecting the lower wiring pattern and the first source/drain pattern. One end of the connection pattern is in contact with the first lower region. A concentration of a dopant in the second lower region is greater than a concentration of a dopant in the second middle region. The second source/drain pattern is disposed in a source/drain trench, and a lowermost end of the source/drain trench is located at a central portion of a bottom surface of the source/drain trench. The first and second middle regions are located at higher height levels than the first and second lower regions, and the first and second lower regions are located at higher height levels than the bottom surface of the source/drain trench.

Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A first field-effect transistor (FET) having a first source/drain region is formed. A second FET having a second source/drain region is formed, where the second FET is stacked above the first FET. A trench extending from above the second source/drain region to beneath the first source/drain region is formed, where the trench passes through portions of (i) the first source/drain region and (ii) the second source/drain region. A bottom contact is formed in the trench. A dielectric layer is formed in the trench, the dielectric layer on a top surface of the bottom contact. A top contact is formed in the trench, the top contact on a top surface of the dielectric layer.

A method of the present disclosure includes forming a stack on a substrate, patterning the stack and the substrate to form first and second active regions, forming an isolation structure between the first and second active regions, depositing an isolation structure protecting layer on the isolation structure, forming a dummy gate stack across the first and second active regions, recessing the first and second active regions to form first and second trenches, forming first and second source/drain features in the first and second trenches, removing the dummy gate stack to form a gate trench, depositing a gate structure in the gate trench and interfacing the isolation structure protecting layer, thinning the substrate and the isolation structure, forming a backside opening exposing a bottom surface of the first source/drain feature, and forming a backside via in the backside opening and in electrical coupling with the first source/drain feature.

Methods for preventing or treating periodontal disease or a dislocated traumatic tooth, for for regenerating periodontium, and for promoting expression of any one or more genes of bone sialoprotein (BSP), dentin matrix protein 1 (DMP1), cementum attachment protein (CAP), collagen type III (COL3), and periostin, are disclosed. The methods include administering an effective amount of a peptide comprising the amino acid sequence of SEQ ID NO: 29 or a pharmaceutically acceptable salt thereof or a composition containing the peptide of a salt thereof.

A semiconductor device includes a back interlayer insulating film; a plurality of first channel patterns on the back interlayer insulating film and spaced apart from each other in a vertical direction; a plurality of second channel patterns on the back interlayer insulating film and spaced apart from each other in the vertical direction; a source/drain pattern between the first channel patterns and the second channel patterns; and a source/drain contact connected to the source/drain pattern, wherein the source/drain pattern includes a first layer which comes into contact with the first channel patterns and the second channel patterns, a second layer on or below the first layer, and a third layer on or above the second layer, wherein a width of the first layer in the vertical direction decreases and then increases, along a direction from the first channel patterns to the second channel patterns.