An electronic device includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material includes a first wire and a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state.

Memory devices and methods are provided. In one aspect, a memory device may comprise a first field element, a second field element, a movable magnetic element, and a first heater. The first field element may be a superconductor. The second field element may be disposed facing the first field element and at a first distance from the first field element. The movable magnetic element may be repelled by the second field element and disposed in a space between the first field element and the second field element. The first heater may be arranged near the first field element. The movable magnetic element may move toward the first field element in response to a first electric current that passes through the first heater.

An electronic component having an asymmetric impedance is provided. The component includes first, second and third branches that connect at a common node. The component includes a first portion of superconducting material disposed along the first branch and a second portion of superconducting material disposed along the second branch. The component includes a first device disposed along the first branch and configured to transition the second portion of the superconducting material to a non-superconducting state when a current between a first terminal of the first device and a second terminal of the first device exceeds a first threshold value and a second device disposed along the second branch and configured to transition the first portion of the superconducting material to a non-superconducting state when a current between a first terminal of the second device and a second terminal of the second device exceeds a second threshold value.

The invention is directed to a device and method to engineer the superconducting transition width by suppressing the phonon populations responsible for the Cooper-pair decoherence below the superconducting transition temperature via phononic bandgap engineering. The device uses phononic crystals to engineer a phononic frequency gap that suppresses the decohering thermal phonon population just below the Cooper-frequency, and thus the normal conduction electron population. For example, such engineering can relax the cooling requirements for a variety of circuits yielding higher operational quality factors for superconducting electronics and interconnects.

A transistor includes (i) a first wire including a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature and (ii) a second wire including a superconducting component configured to operate in a superconducting state while: a temperature of the superconducting component is below a superconducting threshold temperature and a first input current supplied to the superconducting component is below a current threshold. The semiconducting component is located adjacent to the superconducting component. In response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first input current exceeds the lowered current threshold.

The various embodiments described herein include methods, devices, and systems for fabricating and operating diodes. In one aspect, an electrical circuit includes: (1) a diode component having a particular energy band gap; (2) an electrical source electrically coupled to the diode component and configured to bias the diode component in a particular state; and (3) a heating component thermally coupled to a junction of the diode component and configured to selectively supply heat corresponding to the particular energy band gap.

Self-powered scale-up toroidal array quantum processing memory device with controllable and adjustable state-switch valves (CASSV) of making and applications at room temperature in a One-Device-Assembly was invented. The devices comprise of multiple layer organo-metallic cross-linked polymers having various superlattice structures based on a double-pole electron-relay in an electron negative and an electron positive manner in the membranes that promoted Cooper pairs coherently transmitting waves within and cross the Josephson toroidal flexible junction barriers at zero-bias. In the One-Device-Assembly system, the CASSV valve provides a delicate balance and enables the whole device system working when an fJ energy consumption was in demand from the quantum qubits; or when an energy storage device stores 1.53 MJ/cm.sup.2 in demand for a routine automobile vehicle without energy dissipation.

In a solid-state imaging element that detects a change in an amount of light on the basis of a photocurrent, erroneous detection due to a dark current or dark current shot noise is reduced. The solid-state imaging element includes a limiting circuit, a differentiating circuit, and a comparison circuit. The limiting circuit limits an electric signal generated by photoelectric conversion by a predetermined limit value and outputs the electric signal limited as an output signal. The differentiating circuit obtains an amount of change of the output signal output from the limiting circuit. The comparison circuit performs comparison between the amount of change obtained by the differentiating circuit and a predetermined threshold value to output a result of the comparison as a result of detection of an address event.

Embodiments of a Majorana-based qubit are disclosed herein. The qubit is based on the formation of superconducting islands, some parts of which are topological (T) and some parts of which are non-topological. Also disclosed are example techniques for fabricating such qubits. In one embodiment, a semiconductor nanowire is grown, the semiconductor nanowire having a surface with an oxide layer. A dielectric insulator layer is deposited onto a portion of the oxide layer of the semiconductor nanowire, the portion being designed to operate as a non-topological segment in the quantum device. An etching process is performed on the oxide layer of the semiconductor nanowire that removes the oxide layer at the surface of the semiconductor nanowire but maintains the oxide layer in the portion having the deposited dielectric insulator layer. A superconductive layer is deposited on the surface of the semiconductor nanowire, including over the dielectric insulator layer.

The various embodiments described herein include methods, devices, and systems for operating superconducting circuitry. In one aspect, a superconducting component includes: (1) a superconductor having a plurality of alternating narrow and wide portions, each wide portion having a corresponding terminal; and (2) a plurality of heat sources, each heat source thermally coupled to a corresponding narrow portion such that heat from the heat source is transmitted to the corresponding narrow portion; where the plurality of heat sources is electrically isolated from the superconductor.