Provided are a method and apparatus for calculating fault resistance and a current-limiting current of a superconducting fault current limiter. The method includes: calculating a first short-circuit fault current I.sub.n(t) of a power grid short-circuit fault transient circuit calling an external characteristic model U(I, t), and calculating resistance R.sub.n(t) of a superconducting fault current limiter under the first short-circuit fault current I.sub.n(t); adding the resistance R.sub.n(t) of the superconducting fault current limiter into the power grid short-circuit fault transient circuit, and calculating a second short-circuit fault current I.sub.m(t), where m=n+1; and determining whether an error between the second short-circuit fault current I.sub.m(t) and the first short-circuit fault current I.sub.n(t) is smaller than a preset threshold value, if yes, determining the fault resistance and the current-limiting current of the superconducting fault current limiter to be R.sub.n(t) and I.sub.m(t) respectively; otherwise I.sub.n(t)=I.sub.m(t), returning for iteration.

A device includes a plurality of superconducting components, each having a first terminal and a second terminal; a plurality of current sources, being electrically-connected to the first terminal of a corresponding superconducting component and configured to selectively provide a first current; and a bias current source electrically-connected to the respective first terminal of each of the plurality of superconducting components. The bias current source is configured to provide a second current adapted to bias the superconducting components such that (1) a combination of the second current and the first current from each current source causes the plurality of superconducting components to transition from the superconducting state to the non-superconducting state, and (2) a combination of the second current and the first current from each current source of only a subset of the plurality of current sources does not cause the plurality of superconducting components to transition to the non-superconducting state.

A high temperature superconductor, HTS, tape (100) for detecting a quench in a superconducting magnet. The HTS tape comprises an HTS layer (101) of HTS material supported by a substrate (102). The HTS layer is divided into a plurality of strips (104,105,107). The strips are connected (106) in series along an open path.

Embodiments of a Majorana-based qubit are disclosed herein. The qubit is based on the formation of superconducting islands, some parts of which are topological (T) and some parts of which are non-topological. Also disclosed are example techniques for fabricating such qubits. In one embodiment, a semiconductor nanowire is grown, the semiconductor nanowire having a surface with an oxide layer. A dielectric insulator layer is deposited onto a portion of the oxide layer of the semiconductor nanowire, the portion being designed to operate as a non-topological segment in the quantum device. An etching process is performed on the oxide layer of the semiconductor nanowire that removes the oxide layer at the surface of the semiconductor nanowire but maintains the oxide layer in the portion having the deposited dielectric insulator layer. A superconductive layer is deposited on the surface of the semiconductor nanowire, including over the dielectric insulator layer.

A high temperature superconducting, HTS, field coil. The HTS field coil comprises a plurality of turns and a partially insulating layer. The plurality of turns comprises HTS material and metallic stabilizer. The partially insulating layer separates the turns, such that current can be shared between turns via the partially insulating layer. The partially insulating layer comprises an electrically conducting layer, and first and second insulating layers. The electrically conducting layer is coated on one side with the first insulating layer and on the other side with the second insulating layer. Each insulating layer has one or more windows through which electrical contact can be made between the turns and the electrically conducting layer. The windows in the first insulating layer are offset in the plane of the electrically conducting strip from the windows in the second insulating layer.

Memory devices and methods are provided. In one aspect, a memory device may comprise a first field element, a second field element, a movable magnetic element, and a first heater. The first field element may be a superconductor. The second field element may be disposed facing the first field element and at a first distance from the first field element. The movable magnetic element may be repelled by the second field element and disposed in a space between the first field element and the second field element. The first heater may be arranged near the first field element. The movable magnetic element may move toward the first field element in response to a first electric current that passes through the first heater.

Various implementations described herein are related to a device having multiple conductive terminals formed with a superconductive material. The device may include at least one switching layer formed with correlated-electron material (CEM) that is disposed between the multiple conductive terminals. The CEM may comprise carbon or a carbon based compound. The device may refer to a switch structure or similar.

The various embodiments described herein include methods, devices, and systems for operating superconducting circuits. In one aspect, an electric circuit includes: (1) a superconductor component having a first terminal at a first end and a second terminal at a second end; (2) a gate component thermally-coupled to the superconductor component at a first location between the first terminal and the second terminal, where the gate component is thermally-coupled via a first section of the gate component; and where the gate component has a smallest width at the first section so as to focus resistive heating toward the superconductor component.

A superconducting current limiter having at least one superconducting conductor (3) wound so as to form a coil (2) extending in a single plane and connecting a first electrical connection terminal to a second electrical connection terminal, an electrically insulating spacer (8) being arranged between two turns of the coil. The superconducting conductor (3) consists of at least two separate superconducting cables (5) wound in parallel and whose ends are electrically connected by the first electrical connection terminal and by the second electrical connection terminal, respectively. An electrically conductive spacer (12) is arranged between two of said separate superconducting cables (5), this electrically conductive spacer (12) being able to be traversed by a cooling fluid.

The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting circuits. In one aspect, an electric circuit includes: (1) a first superconducting component having a first terminal, a second terminal, and a constriction region between the first terminal and the second terminal; (2) a second superconducting component having a third terminal and a fourth terminal; and (3) a first electrically-insulating component that thermally couples the first superconducting component and the second superconducting component such that heat produced at the constriction region is transferred through the first component to the second superconducting component.