A panel substrate includes a mother substrate having a plurality of cell regions and a peripheral region surrounding the plurality of cell regions. A protective layer is disposed under the mother substrate. The protective layer includes a plurality of main parts overlapping the plurality of cell regions, and a plurality of bridge patterns overlapping the peripheral region. The plurality of bridge patterns connecting main parts adjacent to each other among the plurality of main parts.

A panel substrate includes a mother substrate having a plurality of cell regions and a peripheral region surrounding the plurality of cell regions. A protective layer is disposed under the mother substrate. The protective layer includes a plurality of main parts overlapping the plurality of cell regions, and a plurality of bridge patterns overlapping the peripheral region. The plurality of bridge patterns connecting main parts adjacent to each other among the plurality of main parts.

A display device includes a plurality of LED elements mounted on a substrate, a first resin layer that seals the LED elements, a first light shielding layer arranged on the first resin layer, a second resin layer arranged on the first light shielding layer, and a second light shielding layer arranged on the second resin layer. The first light shielding layer includes a plurality of first light shielding portions and a plurality of first openings. The second light shielding layer includes a plurality of second light shielding portions and a plurality of second openings. Each of the first light shielding portions and the second light shielding portions includes a third opening. Each of the first light shielding portions is arranged at a position overlapping with any of the second openings. Each of the second light shielding portions is arranged at a position overlapping with any of the first openings.

A display device includes a plurality of LED elements mounted on a substrate, a first resin layer that seals the LED elements, a first light shielding layer arranged on the first resin layer, a second resin layer arranged on the first light shielding layer, and a second light shielding layer arranged on the second resin layer. The first light shielding layer includes a plurality of first light shielding portions and a plurality of first openings. The second light shielding layer includes a plurality of second light shielding portions and a plurality of second openings. Each of the first light shielding portions and the second light shielding portions includes a third opening. Each of the first light shielding portions is arranged at a position overlapping with any of the second openings. Each of the second light shielding portions is arranged at a position overlapping with any of the first openings.

A light-emitting device includes a light-emitting element having first to fourth outer edges and including: an inner light-emitting portion including an inner semiconductor structure and inner electrodes; and an outer light-emitting portion surrounding an entire periphery of the inner light-emitting portion in the plan view and including an outer semiconductor structure, a first outer electrode including first to fourth extending portion respectively extending along the first outer edge, one of the third and fourth outer edges, the second outer edge, and the other of the third and fourth outer edges. An outermost surface of the light-emitting element includes surfaces of the inner and outer semiconductor structures. In the plan view, a first gap is between end portions of the first and fourth extending portions, and a second gap is between end portions of the second and third extending portions.

A light-emitting device includes a light-emitting element having first to fourth outer edges and including: an inner light-emitting portion including an inner semiconductor structure and inner electrodes; and an outer light-emitting portion surrounding an entire periphery of the inner light-emitting portion in the plan view and including an outer semiconductor structure, a first outer electrode including first to fourth extending portion respectively extending along the first outer edge, one of the third and fourth outer edges, the second outer edge, and the other of the third and fourth outer edges. An outermost surface of the light-emitting element includes surfaces of the inner and outer semiconductor structures. In the plan view, a first gap is between end portions of the first and fourth extending portions, and a second gap is between end portions of the second and third extending portions.

Disclosed is a superhydrophobic film. The superhydrophobic film includes: a base film; and a plurality of micro-pillars formed on the base film, wherein the base film and the micro-pillar include a biodegradable polymer and nanoparticles.

Disclosed is a superhydrophobic film. The superhydrophobic film includes: a base film; and a plurality of micro-pillars formed on the base film, wherein the base film and the micro-pillar include a biodegradable polymer and nanoparticles.

A multi-chip package may include a system-on-chip (SoC) and an optical IO subassembly on a common substrate. The SoC and the optical IO subassembly may be linked by a die-to-die interface. The optical IO subassembly may include an optical IO IC with microLEDs and/or photodetectors bonded to a surface of the optical IO IC away from the common substrate. An optical window layer may shield optical elements of the optical IO subassembly from damage relating to molding compound related operations during assembly.

A multi-chip package may include a system-on-chip (SoC) and an optical IO subassembly on a common substrate. The SoC and the optical IO subassembly may be linked by a die-to-die interface. The optical IO subassembly may include an optical IO IC with microLEDs and/or photodetectors bonded to a surface of the optical IO IC away from the common substrate. An optical window layer may shield optical elements of the optical IO subassembly from damage relating to molding compound related operations during assembly.