Provided is a semiconductor device including an active portion and a temperature sensitive portion, the semiconductor including: a semiconductor substrate; and an interlayer dielectric film which is provided above the semiconductor substrate, in which the active portion includes an active trench portion, and an active contact portion, the temperature sensitive portion includes a temperature sensitive diode, and a temperature sensitive contact portion, and a contact width of the temperature sensitive contact portion is larger than a contact width of the active contact portion. Provided is a semiconductor device in which in a depth direction of a semiconductor substrate, an extension depth to which a temperature sensitive trench contact portion extends is shallower than an extension depth to which a plurality of active trench contact portions extend.

A semiconductor device has a gate electrode in a trench. The semiconductor substrate has: a first n-type region in contact with the gate insulating film; a p-type upper body region in contact with the gate insulating film below the first n-type region; an n-type barrier region in contact with the gate insulating film below the upper body region; a p-type lower body region in contact with the gate insulating film below the barrier region; a connection portion electrically connecting the barrier region and the upper electrode; an n-type drift region in contact with the gate insulating film below the lower body region; and a second n-type region in contact with the lower electrode. A lower portion of the gate insulating film is thicker than an upper portion of the gate insulating film.

Provided is a semiconductor device including: an active portion which is provided in a semiconductor substrate; and a temperature sensitive portion which is provided above the semiconductor substrate, in which the temperature sensitive portion includes a temperature sensitive diode which is provided above the semiconductor substrate, a first interlayer dielectric film which is provided above the temperature sensitive diode, a temperature sensitive contact portion which is provided to extend from an upper surface to a lower surface of the first interlayer dielectric film, and a housing portion which is provided below the temperature sensitive contact portion, a bottom surface corner portion of the temperature sensitive contact portion is in contact with the temperature sensitive diode, and a bottom surface of the temperature sensitive contact portion is in contact with the housing portion.

A semiconductor device includes a semiconductor substrate, a temperature sensing diode provided on the semiconductor substrate, and a protective diode provided on the semiconductor substrate and connected in inverse parallel to the temperature sensing diode, wherein the temperature sensing diode includes a first anode layer that is a p-type semiconductor layer, and a first cathode layer that is adjacent to the first anode layer in plan view and is an n-type semiconductor layer, the protective diode includes a second anode layer that is a p-type semiconductor layer, and a second cathode layer that is adjacent to the second anode layer in plan view and is an n-type semiconductor layer, and a pn junction area of the second anode layer and the second cathode layer in the protective diode is larger than a pn junction area of the first anode layer and the first cathode layer in the temperature sensing diode.

A dual gate IGBT is presented, where the active region includes a first section and a second section. Both sections may be controlled by two control signals. For example, the active region or a second section of the active region comprises a second barrier region. For example, the first section has a first characteristic transfer curve, with load current in dependence of the voltage of the first control signal, and the second section has a second characteristic transfer curve, with load current in dependence of the voltage of the first control signal. At least the second characteristic transfer curve is changeable based on the voltage of the second control signal.

An upper electrode is separated from a lower electrode inside a trench by an intermediate insulating film. A first resistor is connected between the upper electrode and the input terminal. A second resistor is connected between the lower electrode and the input terminal. Gate-emitter capacitance of the lower electrode is smaller than gate-emitter capacitance of the upper electrode.

There is provided a semiconductor device (100) including a floating region (202) of a second conductivity type which is arranged below a lower end (43) of a first gate trench portion (40), and which does not extend to a region below a lower end (33) of a first dummy trench portion, at an upper surface side of a semiconductor substrate (10), in which a first mesa portion has an emitter region (12) of a first conductivity type which is provided in contact with the first gate trench portion, and which has a higher concentration than that of a drift region (18), and a base region (14) of the second conductivity type, and the lower end of the first dummy trench portion is in contact with a region of the first conductivity type.

Provided is a semiconductor device including: a first doping concentration peak farthest from a lower surface of a semiconductor substrate; and a second doping concentration peak second farthest from the lower surface, in which a predetermined conditional expression is satisfied when an integrated concentration of SiH donors at the first doping concentration peak is denoted as N.sub.1, an integrated concentration of CiOi-H donors between the first doping concentration peak and the second doping concentration peak is denoted as N.sub.COH, a carbon chemical concentration of the semiconductor substrate is denoted as N.sub.C, and N=N.sub.1+N.sub.COH.

The present invention provides a semiconductor device including a transistor portion and a diode portion, in which the transistor portion has a first gate trench portion which is provided to be closest to the diode portion, and a first mesa portion which is in contact with the first gate trench portion, and which is provided between the first gate trench portion and the diode portion, below the first gate trench portion, a first floating region is provided, and the first mesa portion has an uncovered region which does not overlap with the first floating region.

Provided is a semiconductor device including a drift region of a first conductivity type which is provided in a semiconductor substrate, a plurality of trench portions which have a gate trench portion and a dummy trench portion and are arranged at a predetermined pitch in a trench array direction, and an outer circumferential well region of the second conductivity type which is provided on an outer circumference of the semiconductor substrate relative to the plurality of trench portions, in which the plurality of trench portions are provided to be spaced apart from the outer circumferential well region, and a difference between an end portion of the gate trench portion and an end portion of the dummy trench portion in a trench extension direction is less than or equal to twice the pitch.