A method for making a semiconductor device may include forming a stack of alternating gate and nanostructure layers above a substrate, and forming a first superlattice laterally adjacent the stack on a first side thereof and extending from the substrate to an upper surface of the stack to define a first source/drain region. The first superlattice may include a plurality of stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The non-semiconductor monolayers of the first superlattice may be arranged along growth rings extending outwardly from respective adjacent nanostructure layer portions.

A semiconductor device may include a substrate, a stack of alternating gate and nanostructure layers above the substrate, and a first superlattice laterally adjacent the stack on a first side thereof and extending from the substrate to an upper surface of the stack to define a first source/drain region. The first superlattice may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The non-semiconductor monolayers of the first superlattice may be arranged along growth rings extending outwardly from respective adjacent nanostructure layer portions.

A method for forming an oxide layer in a vertical channel structure includes performing a pre-clean process to remove contaminants on exposed surfaces of channel pillars extending in a first direction, performing a silicon layer formation process to form a silicon layer on the exposed surfaces of the channel pillars, and performing a thermal oxidation process to convert the silicon layer to an oxide layer.

Addressable actuator and arrays thereof are described. Actuators may be dielectric elastomer actuators (DBAs). An addressable actuator may include a compliant substrate, with an optical receiver integrated with a first region of the compliant substrate and an actuator integrated with a second region of the compliant substrate, with the optical receiver coupled to the actuator. The optical receivers may comprise percolating networks of semiconductor materials, such as photoconductive channels of zinc oxide nanowires, which may be embedded in a compliant substate, or one or more compliant layers (which may be formed on a substrate). Compliant substrates or layers may include complaint materials such as an elastomer. An actuator array may comprise multiple of the actuators, with each actuator being independently optically addressable. A system may include light emitting devices optically coupled to respective optical receivers to control actuation of the actuators using light.

A quantum dot including a Group IIIA element and a Group VA element of the periodic table of elements, wherein the quantum dot has an absorption peak wavelength of greater than or equal to about 1,000 nm in a visible-infrared (Vis-IR) absorption spectrum, and includes a ligand derived from an aliphatic hydrocarbon compound substituted with a hydroxyl group (OH) and a thiol group (SH) on its surface, a method for preparing the quantum dot, and an electronic device including the quantum dot.

A base structure and a method for manufacturing the base structure, and a semiconductor device are provided. The base structure includes a substrate and a Group III-V superlattice layer. The Group III-V superlattice layer includes a plurality of lattice stack layers stacked on the substrate. A lattice stack layer includes at least two semiconductor layers, and a semiconductor layer includes a first Group III component and a second Group III component. In a same lattice stack layer, a proportion of the first Group III component in a semiconductor layer away from the substrate is less than a proportion of the first Group III component in a semiconductor layer proximate to the substrate. The Group III-V superlattice layer can effectively achieve structural relaxation between the substrate and an epitaxial structure, reduce dislocation density in the epitaxial structure and improve a performance of a device manufactured on the epitaxial structure.

A semiconductor device includes a chip that has a main surface, a trench that is formed in the main surface, and that has a side wall and a bottom wall, an embedded electrode that is embedded in the trench, and that has an electrode surface positioned on the bottom wall side with respect to the main surface and a recess edge portion recessed toward the bottom wall side at an edge portion along the side wall in the electrode surface, and an edge portion insulator that is embedded in the recess edge portion.

A power device and a manufacturing method thereof are provided. The power device includes a compound semiconductor composite layer, a P-type gate layer, a source, a drain, and a gate electrode layer. The P-type gate layer, the source and the drain are all disposed on the compound semiconductor composite layer. The gate electrode layer is disposed on the P-type gate layer. A sidewall of the P-type gate layer facing towards the drain includes a P-type gate slope, and the P-type gate slope is inclined towards the source relative to a surface of the compound semiconductor composite layer.

The present disclosure describes non-classical (e.g., quantum) computing systems and methods that utilize dopant molecules contained in host materials as qubits. The dopant molecules generally comprise ground-state triplet (GST) molecules, such as carbenes or nitrenes. The host materials generally comprise organic molecules. Precursors to the dopant molecules can be embedded in the host materials and then subjected to ultraviolet (UV) or visible light to form dilute molecular crystals comprising the dopant molecules embedded in the host materials. The triplet sub-levels of the dopant molecules may be manipulated using electromagnetic (EM) radiation such as optical, radiofrequency (RF), and/or microwave (MW) radiation to conduct non-classical computing operations.

The present application relates to a semiconductor die, comprising a silicon carbide (SiC) semiconductor body comprising a first doping type region; a metallization on a first side of the SiC semiconductor body; an inorganic passivation layer system; a lateral edge of the inorganic passivation layer system arranged on the SiC semiconductor body, wherein the lateral edge of the inorganic passivation layer system is laterally offset inwards from a lateral edge of the SiC semiconductor body, the SiC semiconductor body being uncovered by the inorganic passivation layer system in an edge area, wherein a second doping type well is formed at the first side of the SiC semiconductor body in the first doping type region, the second doping type well extending from below the inorganic passivation layer system into the edge area.