Patent classifications
H10D10/841
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Protons are injected from a back surface side of a semiconductor substrate to repair both defects within the semiconductor substrate and also defects in a channel forming region on a front surface side of the semiconductor substrate. As a result, variation in gate threshold voltage is reduced and leak current when a reverse voltage is applied is reduced. Provided is a semiconductor device including a semiconductor substrate that includes an n-type impurity region containing protons, on a back surface side thereof; and a barrier metal that has an effect of shielding from protons, on a front surface side of the semiconductor substrate.
SEMICONDUCTOR DEVICE AND RADIO FREQUENCY POWER AMPLIFIER
A transistor includes a collector layer, a base layer, and an emitter layer that are laminated in order on an upper surface of a substrate. Four or more emitter electrodes are electrically coupled to the emitter layer. A base electrode includes two or more base fingers electrically coupled to the base layer. A collector electrode is electrically coupled to the collector layer. The emitter electrodes and the base fingers each have a shape elongated in a first direction in the upper surface of the substrate. The emitter electrode and the base finger are side by side in a second direction orthogonal to the first direction in the upper surface of the substrate. The emitter electrodes are respectively at both ends in the second direction of a row of the four or more emitter electrodes and the two or more base fingers disposed side by side in the second direction.
IMPURE INDIUM PHOSPHIDE SEMICONDUCTOR SUBSTRATE
Aspects disclosed in the detailed description include an impure Indium Phosphide (InP) semiconductor substrate. Related apparatus and methods are also disclosed. In this regard, in some exemplary aspects disclosed herein, a semiconductor substrate comprising a silicon layer and an impure InP layer adjacent to the silicon layer. The impure InP layer may be epitaxially grown on a Silicon (Si) nanoridge base or directly bonded to the silicon layer after being epitaxially grown and cleaved. Utilizing an impure InP layer advantageously provides structural strength to be deployed in a 300 millimeter wafer process while achieving the electrical and thermal characteristic of InP it provides in a semiconductor substrate.