A unit pixel is provided. The unit pixel includes a transparent substrate, a first light blocking layer disposed on the transparent substrate and having windows that transmit light, an adhesive layer covering the first light blocking layer, a plurality of light emitting devices disposed on the adhesive layer to be arranged on the windows, and a second light blocking layer covering side surfaces of the light emitting devices.

A display device includes a substrate in which a plurality of sub pixels are defined; a pair of low potential power lines are in a sub pixel of the plurality of sub pixels; and a plurality of light emitting diodes that overlap an area between the pair of low potential power lines. Each of the plurality of light emitting diodes includes a first semiconductor layer; an emission layer; a second semiconductor layer; a first insulating film that encloses side surfaces of the first semiconductor layer, the emission layer, and the second semiconductor layer; a side electrode on the first insulating film; and a first electrode that is in contact with a bottom surface of the first semiconductor layer and a lower part of the side electrode.

A semiconductor device includes a semiconductor stack, a reflective structure, and a conductive structure. The semiconductor stack includes a first semiconductor structure, a second semiconductor structure and an active region located between the first semiconductor structure and the second semiconductor structure. The reflective structure is located at a side of semiconductor stack closed to the first semiconductor structure, and includes a first metal. The conductive structure locates between the reflective structure and the first semiconductor structure, and includes a first region overlapping with the active structure and a second region which does not overlap with the active structure. The first metal in the second region has a concentration smaller than 5 atomic percent.

A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

A wavelength conversion unit arrangement includes a carrier and a wavelength conversion unit. The wavelength conversion unit includes a wavelength conversion layer and a filter layer, and the filter layer attaches the wavelength conversion unit to the carrier. The filter layer has a first surface facing the carrier and a second surface opposite the first surface, and the first surface and the second surface have different textures.

A thin film resistor structure can include: an n.sup.th metal layer, having a first part and a second part spaced apart from each other, and being located on an (n1).sup.th interlayer dielectric layer; an n.sup.th interlayer dielectric layer, having an upper part and a lower part, where the lower part of the n.sup.th interlayer dielectric layer covers the upper surface of the n.sup.th metal layer and the (n1).sup.thinterlayer dielectric layer, and where the lower part of the n.sup.th interlayer dielectric layer comprises a trench exposing at least a part of the upper surface of the first and second parts of the n.sup.th metal layer; and a thin film resistor, having a continuous structure located on the sidewalls and bottom of the trench, where an upper part of the n.sup.th interlayer dielectric layer covers the thin film resistor and lower part of the n.sup.th interlayer dielectric layer.

The resistor structure of the semiconductor device according to the embodiment may include a semiconductor substrate including a device semiconductor layer and a resistor semiconductor layer, a first isolation region of device and a second isolation region of device respectively disposed on the device semiconductor layer and the resistor semiconductor layer, and a register poly layer disposed on a first register trench from which a portion of the second isolation region of device is removed.

A junction field-effect transistor device includes an integrated temperature sensor, and a method of making the same is disclosed. A temperature sensor material having a first charge carrier polarity is implanted into an area of semiconductor material having a second charge carrier polarity, with the area being located adjacent to the junction field-effect transistor. The sensor material contains dopants and exhibits an electrical resistance that increases with a number of ionized ones of the dopants. The number of ionized dopants increases with the temperature of the material. First and second electrical terminals are provided spaced-apart on the sensor material for measuring the electrical resistance of the material. The measured electrical resistance may be translated into a temperature value for the junction field-effect transistor.

A method for fabricating a semiconductor device includes the steps of first providing a substrate having a planar device region and a non-planar device region, forming fin-shaped structures on the non-planar device region, forming a first shallow trench isolation (STI) around the substrate on the planar device region, forming a second shallow trench isolation (STI) around the fin-shaped structures, forming first gate structures on the substrate of the planar device region, forming second gate structures on the fin-shaped structures, forming a first resistor on the first STI, and forming a second resistor on the second STI.

A nitride semiconductor device is a nitride semiconductor device including an active element and a passive element, and includes: a nitride semiconductor layer divided into an active region and an inactive region in a plan view; and a metal layer in contact with the nitride semiconductor layer in the inactive region. The active element is provided in the active region, and the passive element is provided in the inactive region. The metal layer includes a coherent state or a metamorphic state relative to the nitride semiconductor layer.