B81B7/0064

MOLDED LEAD FRAME SENSOR PACKAGE

Examples provided herein are associated with a molded lead frame of a sensor package. An example sensor package may include a molded lead frame that includes an opening in the molded lead frame, wherein the opening extends from a mount-side of the molded lead frame to a chip-side of the molded lead frame, wherein the chip-side of the molded lead frame is opposite the mount-side; and a sensor mounted to the chip-side of the molded lead frame.

MICROELECTROMECHANICAL SYSTEMS PACKAGES AND METHODS FOR PACKAGING A MICROELECTROMECHANICAL SYSTEMS DEVICE
20200189909 · 2020-06-18 ·

A microelectromechanical systems (MEMS) package may include a wafer having a MEMS device; a metal cap partially anchored to the wafer where at least one point between the cap and the wafer is unanchored, the metal cap at least substantially extending over the MEMS device; an electrical contact pad electrically coupled to the MEMS device; and a sealing layer disposed over the metal cap and the wafer, such that the sealing layer seals a gap between an unanchored portion of the metal cap and the wafer to encapsulate the MEMS device; wherein the electrical contact pad and the metal cap include the same composition.

A MEMS MICROPHONE AND A MANUFACTURING METHOD THEREOF
20200186939 · 2020-06-11 · ·

A MEMS microphone and a manufacturing method thereof are provided. The MEMS microphone comprises a MEMS microphone chip and a housing with an acoustic port. The MEMS microphone chip is mounted in the housing, and a mesh plug is mounted in the acoustic port and made from a mesh material which has a mesh structure that is suitable for passage of sound.

SENSOR

A sensor is provided, including a substrate, a chip and a sensing element. The substrate has a plate-like shape and includes a surface and an interconnect structure disposed in the substrate. The chip is embedded in the substrate and is electrically connected to the interconnect structure. The sensing element is disposed on the surface of the substrate, and is electrically connected to the chip through the interconnect structure.

Wearable infrared temperature sensing device

A wearable device includes a case and a far infrared temperature sensing device. The case has a first opening. The far infrared temperature sensing device is disposed inside the case of the wearable device. The far infrared temperature sensing device includes an assembly structure, a sensor chip, a filter structure, and a metal shielding structure. The assembly structure has an accommodating space and a top opening. The sensor chip is disposed in the accommodating space of the assembly structure. The filter structure is disposed above the sensor chip. The metal shielding structure is disposed above the sensor chip, and has a second opening to expose the filter structure. The first and second openings are communicated to cooperatively define a through hole.

Shielded semiconductor device and lead frame therefor

A shielded semiconductor device is assembled using a lead frame having a die receiving area, leads disposed around the die receiving area, and a bendable strip formed in the die receiving area. Each lead has an inner lead end that is spaced from but near to one of the sides of the die receiving area and an outer lead end that is distal to that side of the die receiving area. An IC die is attached to the die receiving area and electrically connected to the inner lead ends of the leads. An encapsulant is formed over the die and the electrical connections and forms a body. The strip is bent to extend vertically to a top side of the body. A lid is formed on the top side of the body and is in contact with a distal end of the vertical strip.

PIEZOELECTRIC MICROMACHINED ULTRASONIC TRANSDUCERS AND METHODS FOR FABRICATING THEREOF
20200152697 · 2020-05-14 ·

According to various embodiments, a PMUT device may include a wafer, an active layer including a piezoelectric stack, an intermediate layer having a cavity therein where the intermediate layer is disposed between the wafer and the active layer such that the cavity is adjoining the piezoelectric stack. A via may be formed through the active layer and the intermediate layer to the wafer. A metallic layer may be disposed over the active layer and over surfaces of the via. The intermediate layer may include an interposing material surrounding the cavity, and may further include a sacrificial material surrounding the via. The sacrificial material may be different from the interposing material. The metallic layer may include a first member at least substantially overlapping the piezoelectric stack, a second member extending from the first member to the cavity, and a third member extending into the active layer to contact an electrode therein.

MEMS DEVICES AND PROCESSES

The application describes MEMS devices and associated methods of fabrication. The MEMS devices comprise a filter configured and arranged to inhibit the entry of particles into at least a region of the interior of the substrate cavity from a region underlying the substrate.

SHIELDED SEMICONDUCTOR DEVICE AND LEAD FRAME THEREFOR
20200131030 · 2020-04-30 ·

A shielded semiconductor device is assembled using a lead frame having a die receiving area, leads disposed around the die receiving area, and a bendable strip formed in the die receiving area. Each lead has an inner lead end that is spaced from but near to one of the sides of the die receiving area and an outer lead end that is distal to that side of the die receiving area. An IC die is attached to the die receiving area and electrically connected to the inner lead ends of the leads. An encapsulant is formed over the die and the electrical connections and forms a body. The strip is bent to extend vertically to a top side of the body. A lid is formed on the top side of the body and is in contact with a distal end of the vertical strip.

Reducing crosstalk in a mixed-signal multi-chip MEMS device package
10633246 · 2020-04-28 · ·

A mixed-signal multi-chip package comprises a lead frame, a first die, and a digital die. The first die can provide an analog signal in an analog chip pad of the first die. The digital die can receive the analog signal from the first die through an analog chip pad. The analog input chip pad is coupled with the respective analog output chip pad of the first die by a first bonding wire. The digital die is configured to communicate with external circuitry using a digital signal-bearing signal exchanged via at least one first bond pad of the lead-frame. A second bond pad of the lead frame configured to be coupled to a DC voltage extends laterally along a plane of the lead-frame between the first bond pad and the first bonding wire, to form a DC guard between the first bond pad and the first bonding wire.