Patent classifications
B81B2207/015
METHOD FOR PRODUCING MONOLITHIC INTEGRATION OF PIEZOELECTRIC MICROMACHINED ULTRASONIC TRANSDUCERS AND CMOS
A method of forming a monolithic integrated PMUT and CMOS with a coplanar elastic, sealing, and passivation layer in a single step without bonding and the resulting device are provided. Embodiments include providing a CMOS wafer with a metal layer; forming a dielectric over the CMOS; forming a sacrificial structure in a portion of the dielectric; forming a bottom electrode; forming a piezoelectric layer over the CMOS; forming a top electrode over portions of the bottom electrode and piezoelectric layer; forming a via through the top electrode down to the bottom electrode and a second via down to the metal layer through the top electrode; forming a second metal layer over and along sidewalls of the first and second via; removing the sacrificial structure, an open cavity formed; and forming a dielectric layer over a portion of the CMOS, the open cavity sealed and an elastic layer and passivation formed.
INTEGRATED STRUCTURE OF MEMS MICROPHONE AND AIR PRESSURE SENSOR AND FABRICATION METHOD THEREOF
An integrated structure of a MEMS microphone and an air pressure sensor, and a fabrication method for the integrated structure, the structure including a base substrate; a vibrating membrane, back electrode, upper electrode, and lower electrode formed on the base substrate, as well as a sacrificial layer formed between the vibrating membrane and the back electrode and between the upper electrode and the lower electrode; a first integrated circuit electrically connected to the vibrating membrane and the back electrode respectively; and a second integrated circuit electrically connected to the lower electrode and the upper electrode respectively, wherein a region of the base substrate corresponding to the vibrating membrane is provided with a back cavity; the sacrificial layer between the vibrating membrane and the back electrode is hollowed out to from a vibrating space that communicates with the exterior of the integrated structure, and the sacrificial layer between the upper electrode and the lower electrode is hollowed out to form a closed space; and the integrated circuits are formed on a chip, thereby reducing the interference of connection lines on the performance of a microphone, reducing the introduction of noise, reducing the size of a product and reducing power consumption.
Optical electronics device
An optical electronics device includes first, second and third wafers. The first wafer has a semiconductor substrate with a dielectric layer on a side of the semiconductor substrate. The second wafer has a transparent substrate with an anti-reflective coating on a side of the transparent substrate. The first wafer is bonded to the second wafer at a silicon dioxide layer between the semiconductor substrate and the anti-reflective coating. The first and second wafers include a cavity extending from the dielectric layer through the semiconductor substrate and through the silicon dioxide layer to the anti-reflective coating. The third wafer includes micromechanical elements. The third wafer is bonded to the dielectric layer, and the micromechanical elements are contained within the cavity.
MEMS method and structure
MEMS structures and methods utilizing a locker film are provided. In an embodiment a locker film is utilized to hold and support a moveable mass region during the release of the moveable mass region from a surrounding substrate. By providing additional support during the release of the moveable mass, the locker film can reduce the amount of undesired movement that can occur during the release of the moveable mass, and preventing undesired etching of the sidewalls of the moveable mass.
HIGH ACCURACY TEMPERATURE-COMPENSATED PIEZORESISTIVE POSITION SENSING SYSTEM
A micromirror array comprises a substrate, a plurality of mirrors for reflecting incident light and, for each mirror of the plurality of mirrors, at least one piezoelectric actuator for displacing the mirror, wherein the at least one piezoelectric actuator is connected to the substrate. The micromirror array further comprises one or more pillars connecting the mirror to the at least one piezoelectric actuator. Also disclosed is a method of forming such a micromirror array. The micromirror array may be used in a programmable illuminator. The programmable illuminator may be used in a lithographic apparatus and/or in an inspection and/or metrology apparatus.
METHODS FOR PACKAGING A MICROELECTROMECHANICAL SYSTEMS DEVICE
A method for packaging a MEMS device includes the following steps. A metal cap is provided that is partially anchored to a wafer comprising the MEMS device where at least one point between the cap and the wafer is unanchored, the metal cap arranged to at least substantially extend over the MEMS device. An electrical contact pad is electrically coupled to the MEMS device. A sealing layer is provided over the metal cap and the wafer such that the sealing layer seals a gap between an unanchored portion of the metal cap and the wafer to encapsulate the MEMS device, where the electrical contact pad and the metal cap include the same composition.
MICROELECTROMECHANICAL DEVICE WITH SIGNAL ROUTING THROUGH A PROTECTIVE CAP
A microelectromechanical device includes: a body accommodating a microelectromechanical structure; and a cap bonded to the body and electrically coupled to the microelectromechanical structure through conductive bonding regions. The cap including a selection module, which has first selection terminals coupled to the microelectromechanical structure, second selection terminals, and at least one control terminal, and which can be controlled through the control terminal to couple the second selection terminals to respective first selection terminals according, selectively, to one of a plurality of coupling configurations corresponding to respective operating conditions.
Method of making ohmic contact on low doped bulk silicon for optical alignment
Various embodiments of the present disclosure are directed towards a method for forming an integrated chip including an epitaxial layer overlying a microelectromechanical systems (MEMS) substrate. The method includes bonding a MEMS substrate to a carrier substrate, the MEMS substrate includes monocrystalline silicon. An epitaxial layer is formed over the MEMS substrate, the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts are formed over the epitaxial layer, the plurality of contacts respectively form ohmic contacts with the epitaxial layer.
CMOS ultrasonic transducers and related apparatus and methods
CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.
Wafer level shim processing
Methods and apparatus for proving a sensor assembly. Embodiments can include employing a circuit assembly having a first layer bonded to a second layer with an oxide layer, depositing bonding oxide on the second layer of the circuit assembly, and thinning the first layer of the circuit assembly after depositing the bonding oxide. A coating can be applied over at least a portion of the first layer of the circuit assembly after annealing the circuit assembly. After polishing the bonding oxide on the second surface of the second layer of the circuit assembly, a shim can be secured to the bonding oxide on the second surface of the second layer of the circuit assembly to reduce bow of the assembly. Embodiments can provide a sensor useful in focal plane arrays.