Patent classifications
B81C1/00404
Optical memory devices using a silicon wire grid polarizer and methods of making and using
Long term optical memory includes a storage medium composed from an array of silicon nanoridges positioned onto the fused silica glass. The array has first and second polarization contrast corresponding to different phase of silicon. The first polarization contrast results from amorphous phase of silicon and the second polarization contrast results from crystalline phase of silicon. The first and second polarization states are spatially distributed over plurality of localized data areas of the storage medium.
Methods for multiple-patterning nanosphere lithography for fabrication of periodic three-dimensional hierarchical nanostructures
A robust and general fabrication/manufacturing method is described herein for the fabrication of periodic three-dimensional (3D) hierarchical nanostructures in a highly scalable and tunable manner. This nanofabrication technique exploits the selected and repeated etching of spherical particles that serve as resist material and that can be shaped in parallel for each processing step. The method enables the fabrication of periodic, vertically aligned nanotubes at the wafer scale with nanometer-scale control in three dimensions including outer/inner diameters, heights/hole-depths, and pitches. The method was utilized to construct 3D periodic hierarchical hybrid silicon and hybrid nanostructures such as multi-level solid/hollow nanotowers where the height and diameter of each level of each structure can be configured precisely as well as 3D concentric plasmonic supported metal nanodisk/nanorings with tunable optical properties on a variety of substrates.
SURFACE MICROMACHINED STRUCTURES
Described examples include an apparatus having a substrate with a substrate surface. The apparatus also includes an element with a planar surface facing the substrate surface and with a nonplanar surface opposite the planar surface facing away from the substrate surface.
Thin-film transistor and method of forming an electrode of a thin-film transistor
In various embodiments, electronic devices such as touch-panel displays incorporate interconnects featuring a conductor layer and, disposed above the conductor layer, a capping layer comprising an alloy of Cu and one or more refractory metal elements selected from the group consisting of Ta, Nb, Mo, W, Zr, Hf, Re, Os, Ru, Rh, Ti, V, Cr, and Ni.
OPTICAL MEMORY DEVICES USING A SILICON WIRE GRID POLARIZER AND METHODS OF MAKING AND USING
Long term optical memory includes a storage medium composed from an array of silicon nanoridges positioned onto the fused silica glass. The array has first and second polarization contrast corresponding to different phase of silicon. The first polarization contrast results from amorphous phase of silicon and the second polarization contrast results from crystalline phase of silicon. The first and second polarization states are spatially distributed over plurality of localized data areas of the storage medium.
STRUCTURE FORMING METHOD AND DEVICE
A structure forming method according to an aspect is a structure forming method for forming a first hole and a second hole having width smaller than width of the first hole in a substrate with dry etching and forming a structure. The structure forming method includes forming an etching mask on the substrate, etching a portion of the etching mask overlapping a first hole forming region where the first hole is formed, etching a portion of the etching mask overlapping a second hole forming region where the second hole is formed, and performing the dry etching of the substrate using the etching mask as a mask.
MICROMACHINED MIRROR ASSEMBLY HAVING REFLECTIVE LAYERS ON BOTH SIDES
Embodiments of the disclosure provide a micromachined mirror assembly having a mirror-base layer, a first reflective layer on a top surface of the mirror-base layer, and a second reflective layer on a bottom surface of the mirror-base layer. In an example, the first reflective layer is reflective to incident light of the micromachined mirror assembly, and the first reflective layer and the second reflective layer are made of a same material and have same dimensions.
SUPERHYDROPHOBIC AND SUPEROLEOPHOBIC NANOSURFACES
Devices, systems and techniques are described for producing and implementing articles and materials having nanoscale and microscale structures that exhibit superhydrophobic, superoleophobic or omniphobic surface properties and other enhanced properties. In one aspect, a surface nanostructure can be formed by adding a silicon-containing buffer layer such as silicon, silicon oxide or silicon nitride layer, followed by metal film deposition and heating to convert the metal film into balled-up, discrete islands to form an etch mask. The buffer layer can be etched using the etch mask to create an array of pillar structures underneath the etch mask, in which the pillar structures have a shape that includes cylinders, negatively tapered rods, or cones and are vertically aligned. In another aspect, a method of fabricating microscale or nanoscale polymer or metal structures on a substrate is made by photolithography and/or nano imprinting lithography.
Optical memory devices using a silicon wire grid polarizer and methods of making and using
Long term optical memory includes a storage medium composed from an array of silicon nanoridges positioned onto the fused silica glass. The array has first and second polarization contrast corresponding to different phase of silicon. The first polarization contrast results from amorphous phase of silicon and the second polarization contrast results from crystalline phase of silicon. The first and second polarization states are spatially distributed over plurality of localized data areas of the storage medium.
FENCE STRUCTURE TO PREVENT STICTION IN A MEMS MOTION SENSOR
The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.