A pattern formation method according to an embodiment includes providing a substrate in which protrusions each having a tapered shape are provided on a main surface. The method further includes supplying the main surface with spherical particles equal in diameter to make the spherical particles arrange in a triangular lattice form such that each of the protrusions is at least partially positioned within a region surrounded by the main surface and three of the spherical particles adjacent to one another.

In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.

Disclosed are sulfur-containing compounds for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers on a substrate and plasma etching methods of using the same. The plasma etching compounds may provide improved selectivity between the Si-containing layers and mask material, less damage to channel region, a straight vertical profile, and reduced bowing in pattern high aspect ratio structures.

Techniques herein provide a process to reform or flatten asymmetric spacers to form a square profile which creates symmetric spacers for accurate pattern transfer. Initial spacer formation typically results in spacer profiles with a curved or sloped top surfaces. This asymmetric top surface is isolated while protecting a remaining lower portion of the spacer. The top surface is removed using a plasma processing step resulting in spacers having a squared profile that enables further patterning and/or accurate pattern transfer.

In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.

At the first etching step of etching an SOI substrate from a first silicon layer side, a portion of a first structure formed of the first silicon layer is formed as a pre-structure having a larger shape than a final shape. At the mask formation step of forming a final mask on a second silicon layer side of the SOI substrate, a first mask corresponding to the final shape of the first structure is formed in the pre-structure. At the second etching step of etching the SOI substrate from the second silicon layer side, the second silicon layer and the pre-structure are, using the first mask, etched to form the final shape of the first structure.

Techniques herein provide a process to reform or flatten asymmetric spacers to form a square profile which creates symmetric spacers for accurate pattern transfer. Initial spacer formation typically results in spacer profiles with a curved or sloped top surfaces. This asymmetric top surface is isolated while protecting a remaining lower portion of the spacer. The top surface is removed using a plasma processing step resulting in spacers having a squared profile that enables further patterning and/or accurate pattern transfer.

In the method, a sidewall pattern is formed in a side wall of a first resist pattern that is formed on a second hard mask layer of a base material in which first and second hard mask layers are laminated in the order of description, a second hard mask pattern is formed by etching the second hard mask layer by using the sidewall pattern as a mask, a first hard mask pattern is formed by etching the first hard mask layer by using, as a mask, the second hard mask pattern and a second resist pattern that is formed on the first hard mask layer of the base material, and the first and second fine patterns are formed by etching the base material by using the first hard mask pattern as a mask.

A pattern formation method according to an embodiment includes providing a substrate in which protrusions each having a tapered shape are provided on a main surface. The method further includes supplying the main surface with spherical particles equal in diameter to make the spherical particles arrange in a triangular lattice form such that each of the protrusions is at least partially positioned within a region surrounded by the main surface and three of the spherical particles adjacent to one another.

A method creates MEMS structures by selectively etching a silicon wafer that is patterned by using a masking layer. The method comprises depositing and patterning a first mask on a silicon wafer to define desired first areas on the wafer to be etched. First trenches are etched on parts of the wafer not covered by the first mask. The first trenches are filled with a deposit layer. A part of the deposit layer is removed on desired second areas to be etched and a remainder is left on areas to function as a second mask to define final structures. Parts of the wafer on the desired second areas is etched, and the second mask is removed. A gyroscope or accelerator can be manufactured by dimensioning the structures.