A method of forming an ultrasonic transducer device includes forming and patterning a film stack over a substrate, the film stack comprising a metal electrode layer and a chemical mechanical polishing (CMP) stop layer formed over the metal electrode layer; forming an insulation layer over the patterned film stack; planarizing the insulation layer to the CMP stop layer; measuring a remaining thickness of the CMP stop layer; and forming a membrane support layer over the patterned film stack, wherein the membrane support layer is formed at thickness dependent upon the measured remaining thickness of the CMP stop layer, such that a combined thickness of the CMP stop layer and the membrane support layer corresponds to a desired transducer cavity depth.

A substrate plate is provided for at least one MEMS device to be mounted thereon. The MEMS device has a certain footprint on the substrate plate, and the substrate plate has a pattern of electrically conductive leads to be connected to electric components of the MEMS device. The pattern forms contact pads within the footprint of the MEMS device and includes at least one lead structure that extends on the substrate plate outside of the footprint of the MEMS device and connects a number of the contact pads to an extra contact pad. The lead structure is a shunt bar that interconnects a plurality of contact pads of the MEMS device and is arranged to be removed by means of a dicing cut separating the substrate plate into a plurality of chip-sized units. At least a major part of the extra contact pad is formed within the footprint of one of the MEMS devices.

A method of leak detection of hermetically sealed cavities semiconductor devices is provided. Scribe streets are formed with access from each packaged device on a first substrate to the edge of the first substrate. The first substrate is attached to a second substrate, forming gaps between the two substrates. A cavity is formed around a packaged device on the first substrate by attaching a bond ring to the first substrate and an optically transparent window above the bonding ring. The cavity is evacuated. A high powered laser beam strikes the top surface of the device on the first substrate within the cavity and creates a vertical surface displacement of the first substrate. The vertical surface displacement is monitored using a separate interrogation laser beam. Leakage of the cavity can be measured by characterizing the resonance decay rate, Q.

Electronic devices and methods for fabricating electronic devices are provided. In one example, an electronic device includes an electronic device body structure having a substantially hermetically sealed cavity formed therein. A getter film is in fluid communication with the substantially hermetically sealed cavity. Conductive features are accessible from outside the substantially hermetically sealed cavity and are operatively coupled to the getter film for electrical communication with the getter film.

According to an embodiment, a micro-fabricated test structure includes a structure mechanically coupled between two rigid anchors and disposed above a substrate. The structure is released from the substrate and includes a test layer mechanically coupled between the two rigid anchors. The test layer includes a first region having a first cross-sectional area and a constricted region having a second cross-sectional area smaller than the first cross-sectional area. The structure also includes a first tensile stressed layer disposed on a surface of the test layer adjacent the first region.

Electronic devices and methods for fabricating electronic devices are provided. In one example, an electronic device includes an electronic device body structure having a substantially hermetically sealed cavity formed therein. A getter film is in fluid communication with the substantially hermetically sealed cavity. Conductive features are accessible from outside the substantially hermetically sealed cavity and are operatively coupled to the getter film for electrical communication with the getter film.

A production method for a detection apparatus includes: forming at least one sensitive region having at least one exposed sensing area on and/or in a semiconductor substrate, encapsulating at least one part of the semiconductor substrate so that the at least one sensing area is sealed in an air-, liquid- and/or particle-tight fashion from an external environment, and forming at least one opening so that at least one air, liquid and/or particle access from the external environment to the at least one sensing area is created, wherein before forming the at least one opening, at least one first test and/or calibration measurement is performed, for which at least one sensor signal of the at least one sensitive region having the at least one sensing area sealed in an air-, liquid- and/or particle-tight fashion is determined as at least one first test and/or calibration signal. Also described are related detection apparatuses.

A method of leak detection of hermetically sealed cavities semiconductor devices is provided. Scribe streets are formed with access from each packaged device on a first substrate to the edge of the first substrate. The first substrate is attached to a second substrate, forming gaps between the two substrates. A cavity is formed around a packaged device on the first substrate by attaching a bond ring to the first substrate and an optically transparent window above the bonding ring. The cavity is evacuated. A high powered laser beam strikes the top surface of the device on the first substrate within the cavity and creates a vertical surface displacement of the first substrate. The vertical surface displacement is monitored using a separate interrogation laser beam. Leakage of the cavity can be measured by characterizing the resonance decay rate, Q.

According to an embodiment, a micro-fabricated test structure includes a structure mechanically coupled between two rigid anchors and disposed above a substrate. The structure is released from the substrate and includes a test layer mechanically coupled between the two rigid anchors. The test layer includes a first region having a first cross-sectional area and a constricted region having a second cross-sectional area smaller than the first cross-sectional area. The structure also includes a first tensile stressed layer disposed on a surface of the test layer adjacent the first region.

The present disclosure discloses a method for wafer-level chip scale packaged wafer testing. The method comprises: dicing a wafer-level chip scale packaged wafer into a plurality of wafer strips each comprising a plurality of un-diced chip scale packaged devices; fixing the wafer strips onto a plurality of corresponding strip carriers respectively; testing the chip scale packaged devices of the wafer strips fixed onto the strip carriers by a testing equipment; and dicing the tested wafer strips into a plurality of individual chip scale packaged devices. Since the proposed method does not involve loading a multitude of diced chips into sockets one by one, but that a limited number of wafer strips are loaded onto corresponding strip carriers, flow jam is avoided.