B82B3/0019

Antibacterial medical implant surface

Aspects include methods of fabricating antibacterial surfaces for medical implant devices including patterning a photoresist layer on a silicon substrate and etching the silicon to generate a plurality of nanopillars. Aspects also include removing the photoresist layer from the structure and coating the plurality of nanopillars with a biocompatible film. Aspects also include a system for preventing bacterial infection associated with medical implants including a thin silicon film including a plurality of nanopillars.

METHOD OF FORMING A NANOPORE AND RESULTING STRUCTURE
20200088713 · 2020-03-19 ·

Methods are provided for manufacturing well-controlled, solid-state nanopores in close proximity and arrays thereof. In one embodiment, a plurality of wells and one or more channels are formed in a substrate. Each of the wells is adjacent a channel. A portion of a sidewall of each well is exposed. The portion of exposed sidewall is nearest to the adjacent channel. The portion of the exposed sidewall of each well is laterally etched towards the adjacent channel. A nanopore is formed connecting the wells to an adjacent channel.

Self-aligned nanotips with tapered vertical sidewalls

A method of forming a semiconductor structure includes forming a substrate, forming an anchor layer, and forming one or more self-aligned nanotip pillar pairs disposed vertically between the substrate and the anchor layer. A given one of the nanotip pillar pairs comprises a bottom nanotip pillar and a top nanotip pillar, the bottom nanotip pillar comprising a base portion disposed on a top surface of the substrate and the top nanotip pillar comprising a base portion disposed in the anchor layer. The bottom nanotip pillar and the top nanotip pillar comprise sidewalls that taper to points as distance from the respective base portions increases.

Plasmon Resonance Imaging Apparatus Having Metal-Insulator-Metal Nanocups

Provided are plasmon resonance imaging devices having metal-insulator-metal nanocups and methods of use thereof.

FORMING NANOSCALE PORES IN A SEMICONDUCTOR STRUCTURE UTILIZING NANOTUBES AS A SACRIFICIAL TEMPLATE
20190353615 · 2019-11-21 ·

A method of forming a semiconductor structure includes forming two or more catalyst nanoparticles from a metal layer disposed over a substrate in two or more openings of a hard mask patterned over the metal layer. The method also includes growing two or more carbon nanotubes using the catalyst nanoparticles, and removing the carbon nanotubes to form two or more nanoscale pores. The two or more nanoscale pores may be circular nanoscale pores having a substantially uniform diameter. The two or more openings in the hard mask may have non-uniform size, and the substantially uniform diameter of the two or more nanopores may be controlled by a size of the carbon nanotubes.

Build Sequences for Mechanosynthesis

Build sequences for fabricating an atomically-precise product can be determined using computational chemistry algorithms to simulate mechanosynthetic reactions, and which may use the mechanosynthesis process conditions or equipment limitations in these simulations, to determine a set of mechanosynthetic reactions that will build an atomically-precise workpiece with a desired degree of reliability. Methods for error correction of pathological reactions or avoidance of pathological reactions are disclosed. Libraries of reactions may be used to reduce simulation requirements.

Device and method for forming same
10338057 · 2019-07-02 · ·

The membrane of a conventional solid-state nanopore device, which is believed to be promising for understanding the structural characteristics of DNA and determining a nucleotide sequence, has been thick, and the accuracy in determining a nucleotide sequence in the DNA chain has been insufficient. A method characterized by forming a membrane by forming a first film on a first substrate having a surface of Si, then forming a hole in the first film in such a manner that the surface of the first substrate is exposed, then forming a second film on the first film and on the surface of the first substrate and then etching the first substrate with a solution which does not remove the second film.

SELF-ALIGNED NANOTIPS WITH TAPERED VERTICAL SIDEWALLS
20190187097 · 2019-06-20 ·

A method of forming a semiconductor structure includes forming a substrate, forming an anchor layer, and forming one or more self-aligned nanotip pillar pairs disposed vertically between the substrate and the anchor layer. A given one of the nanotip pillar pairs comprises a bottom nanotip pillar and a top nanotip pillar, the bottom nanotip pillar comprising a base portion disposed on a top surface of the substrate and the top nanotip pillar comprising a base portion disposed in the anchor layer. The bottom nanotip pillar and the top nanotip pillar comprise sidewalls that taper to points as distance from the respective base portions increases.

Build sequences for mechanosynthesis

Methods for creating build sequences which are determined using computational chemistry algorithms to simulate mechanosynthetic reactions, and which may use the mechanosynthesis process conditions or equipment limitations in these simulations, and which facilitate determining a set of mechanosynthetic reactions that will build an atomically-precise workpiece with a desired degree of reliability. Included are methods for error correction of pathological reactions or avoidance of pathological reactions. Libraries of reactions may be used to reduce simulation requirements.

Composition of, and method for forming, a semiconductor structure with multiple insulator coatings

A semiconductor structure includes a nanocrystalline core comprising a first semiconductor material, and at least one nanocrystalline shell comprising a second, different, semiconductor material that at least partially surrounds the nanocrystalline core. The nanocrystalline core and the nanocrystalline shell(s) form a quantum dot. An insulator layer encapsulates the quantum dot to create a coated quantum dot, and at least one additional insulator layer encapsulates the coated quantum dot.