A semiconductor device includes a first silicon layer disposed between second and third silicon layers and separated therefrom by respective first and second oxide layers. A cavity within the first silicon layer is bounded by interior surfaces of the second and third silicon layers, and a passageway extends through the second silicon layer to enable material removal from within the semiconductor device to form the cavity. A metal feature is disposed within the passageway to hermetically seal the cavity.

The present disclosure provides a method for fabricating a semiconductor structure, including bonding a capping substrate over a sensing substrate, forming a through hole traversing the capping substrate, forming a dielectric layer over the capping substrate under a first vacuum level, and forming a metal layer over the dielectric layer under a second vacuum level, wherein the second vacuum level is higher than the first vacuum level.

A microelectromechanical systems (MEMS) die includes a first diaphragm and a second diaphragm, wherein the first diaphragm and the second diaphragm bound a sealed chamber. A stationary electrode is disposed within the sealed chamber between the first diaphragm and the second diaphragm. A tunnel passes through the first diaphragm and the second diaphragm without passing through the stationary electrode, wherein the tunnel is sealed off from the chamber. The MEMS die further includes a substrate having an opening formed therethrough, wherein the tunnel provides fluid communication from the opening, through the second diaphragm, and through the first diaphragm.

A package-level, integrated high-vacuum ion-chip enclosure having improved thermal characteristics is disclosed. Enclosures in accordance with the present invention include first and second chambers that are located on opposite sides of a chip carrier, where the chambers are fluidically coupled via a conduit through the chip carrier. The ion trap is located in the first chamber and disposed on the chip carrier. A source for generating an atomic flux is located in the second chamber. The separation of the source and ion trap in different chambers affords thermal isolation between them, while the conduit between the chambers enables the ion trap to receive the atomic flux.

A MEMS device includes a lower substrate having a resonator, an upper substrate disposed to oppose an upper electrode of the resonator, a bonding layer sealing an internal space between the lower substrate and the upper substrate, and wiring layers that contain the same metal material as the bonding layer. Moreover, a rare gas content of each of the wiring layers is less than 1×10.sup.20 (atoms/cm.sup.3).

A MEMS element within a semiconductor device is enclosed within a cavity bounded at least in part by hydrogen-permeable material. A hydrogen barrier is formed within the semiconductor device to block propagation of hydrogen into the cavity via the hydrogen-permeable material.

The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.

A microelectromechanical is provided that includes a support layer, a device layer and a cap layer, a first cavity and a second cavity. The first cavity and the second cavity are delimited by the support layer, the device layer and the cap layer. Moreover, the cap layer includes a through-hole that extends from the top surface of the cap layer to the first cavity. The microelectromechanical component includes a plug inside the through-hole and that seals the first cavity.

The present disclosure provides a method for fabricating a semiconductor structure, including bonding a capping substrate over a sensing substrate, forming a through hole traversing the capping substrate, forming a dielectric layer over the capping substrate under a first vacuum level, and forming a metal layer over the dielectric layer under a second vacuum level, wherein the second vacuum level is higher than the first vacuum level.

A method for encapsulating an MEMS structure in a stack structure includes providing a functional wafer structure including at least partly the MEMS structure. The method includes arranging the functional wafer structure and a glass wafer in the stack structure and along a stacking direction and is performed such that a cavity, in which at least part of the MEMS structure is arranged, is closed on one side along the stacking direction by the glass wafer and such that a spacing structure is arranged between the part of the MEMS structure and the glass wafer in the stack structure to provide a spacing between the part of the MEMS structure and the glass wafer along the stacking direction, such that the spacing structure encloses part of the cavity.