A method and structure for a PLCSP (Package Level Chip Scale Package) MEMS package. The method includes providing a MEMS chip having a CMOS substrate and a MEMS cap housing at least a MEMS device disposed upon the CMOS substrate. The MEMS chip is flipped and oriented on a packaging substrate such that the MEMS cap is disposed above a thinner region of the packaging substrate and the CMOS substrate is bonding to the packaging substrate at a thicker region, wherein bonding regions on each of the substrates are coupled. The device is sawed to form a package-level chip scale MEMS package.

An apparatus and method wherein the method comprises: a deformable substrate; a curved support structure configured to support at least a portion of a resistive sensor wherein the resistive sensor comprises a first electrode, a second electrode and a resistive sensor material provided between the electrodes; at least one support configured to space the curved support structure from the deformable substrate so that when the deformable substrate is deformed the curved support structure is not deformed in the same way; wherein the resistive sensor is positioned on the curved support structure so as to limit deformation of the resistive sensor when the deformable substrate is deformed.

The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a substrate, a first electronic component, an interlayer, a third electronic component and an encapsulant. The first electronic component is disposed on the substrate. The first electronic component has an upper surface and a lateral surface and a first edge between the upper surface and the lateral surface. The interlayer is on the upper surface of the first electronic component. The third electronic component is attached to the upper surface of the first electronic component via the interlayer. The encapsulant encapsulates the first electronic component and the interlayer. The interlayer does not contact the lateral surface of the first electronic component.

A method includes placing a microelectromechanical system (MEMS) device over a carrier, wire bonding the MEMS device to a bond pad on the carrier with a bond wire, and spray coating a buffer layer over the MEMS device and enclosing the bond wire. A Young's modulus value of the buffer layer is less than a Young's modulus value of the MEMS device.

A semiconductor device includes a first region; a second region that is peripheral to the first region; a substrate having a first surface and a second surface arranged opposite to the first surface; a stress-sensitive sensor disposed in the first region at the first surface of the substrate; a back end of line (BEOL) stack disposed on the first surface of the semiconductor chip that extends laterally from the MEMS element, in the first region, into the second region; a first cavity formed in the BEOL stack that exposes the sensitive area of the stress-sensitive sensor, wherein the first cavity extends entirely through the BEOL stack over the first region thereby exposing a sensitive area of the stress-sensitive sensor; and at least one stress-decoupling trench laterally spaced from the stress-sensitive sensor and laterally spaced from the first cavity with a portion of the BEOL stack interposed between.

A micro-electromechanical system (MEMS) apparatus has an array of micro-mirrors and a control circuit for rotating the micro-mirrors synchronously at a resonant frequency. The MEMS apparatus includes elements with different Coefficients of Thermal Expansion (CTE) for a die substrate coupled to the array of micro-mirrors, a die attach layer, a chip package coupled to the die substrate and a printed circuit board coupled to the chip package. The apparatus provides mechanisms for reducing changes in the resonant frequency due to changes in temperature causing stresses due to a mismatch between the CTE of the different elements. A thermoelectric cooler is used, along with the optional addition of heating resistors, additional pins to distribute stress, and the widened vias allowing room for the pins to bend and relieve stress on the chip package.

A microelectromechanical system (MEMS) sensor package includes a laminate that provides physical support and electrical connection to a MEMS sensor. A resin layer is embedded within an opening of the laminate and a MEMS support layer is embedded within the opening by the resin layer. A MEMS structure of the MEMS sensor is located on the upper surface of the MEMS support layer.

An integrated CMOS-MEMS device includes a first substrate having a CMOS device, a second substrate having a MEMS device, an insulator layer disposed between the first substrate and the second substrate, a dischargeable ground-contact, an electrical bypass structure, and a contrast stress layer. The first substrate includes a conductor that is conductively connecting to the CMOS devices. The electrical bypass structure has a conducting layer conductively connecting this conductor of the first substrate with the dischargeable ground-contact through a process-configurable electrical connection. The contrast stress layer is disposed between the insulator layer and the conducting layer of the electrical bypass structure.

An implementation of a MEMS device includes a constrained diaphragm comprising a surface, the diaphragm having a net compressive stress; and a backplate comprising a surface facing the surface of the diaphragm, the surface of the backplate having a center, and a post extending from the surface of the backplate, wherein the post is located at or near a center of the surface and limits a maximum deflection of the diaphragm.

An implementation of a MEMS device includes a constrained diaphragm comprising a surface, the diaphragm having a net compressive stress; and a backplate comprising a surface facing the surface of the diaphragm, the surface of the backplate having a center, and a post extending from the surface of the backplate, wherein the post is located at or near a center of the surface and limits a maximum deflection of the diaphragm.