The application relates to structures, e.g. substrates for supporting semiconductor die. The substrate defines a frame which lateral surrounds one or more die and is provided in contact with at least one side surface of the die, wherein the frame defines upper and lower surfaces of the substrate.

A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.

A microelectromechanical device includes: a body accommodating a microelectromechanical structure; and a cap bonded to the body and electrically coupled to the microelectromechanical structure through conductive bonding regions. The cap including a selection module, which has first selection terminals coupled to the microelectromechanical structure, second selection terminals, and at least one control terminal, and which can be controlled through the control terminal to couple the second selection terminals to respective first selection terminals according, selectively, to one of a plurality of coupling configurations corresponding to respective operating conditions.

A micro-electro-mechanical system (MEMS) package structure and a method for fabricating the MEMS package structure. The MEMS package structure includes a MEMS die (200) and a device wafer (100). A control unit and an interconnection structure (300) are formed in the device wafer (100), and a first contact pad (410) and an input-output connecting member (420) are formed on a first bonding surface (100a) of the device wafer (100). The MEMS die (200) is coupled to the first bonding surface (100a) through a bonding layer (500). The MEMS die (200) includes a closed micro-cavity (220) and a second contact pad (220). The first contact pad (410) is electrically connected to a corresponding second contact pad (220). An opening (510) that exposes the input-output connecting member (420) is formed in the bonding layer (500). The MEMS package structure allows electrical interconnection between the MEMS die (200) and the device wafer (100) with a reduced package size, compared to those produced by existing integration techniques. In addition, function integration ability of the package structure is improved by integrating a plurality of MEMS dies of the same or different structures and functions on the same device wafer.

A device for suppressing stray radiation includes a Micro-ElectroMechanical System (MEMS) sensor module and a conductive cage structure. The conductive cage structure may enclose the MEMS sensor module in order to suppress penetration of stray electromagnetic radiation with a stray wavelength λ.sub.o into the conductive cage structure, and the conductive cage structure may be arranged to be thermally insulated from the MEMS sensor module. The device may also include a connecting line. The connecting line may be connected to the MEMS sensor module and fed through the conductive cage structure by a capacitive element.

An electrical contacting between a surrounding wiring and a conductor region. The conductor region is situated in a conductor layer above an SOI wafer or SOI chip. A cover layer is situated above the conductor layer and below the surrounding wiring. The cover layer has a contacting region. The contacting region is insulated from the rest of the cover layer by a first configuration of recesses. An opening is formed at least in the contacting region. A metallic material is situated in the opening. The metallic material connects the surrounding wiring and the conductor region.

A wafer level package comprises a functional wafer with a first surface, device structures connected to device pads arranged on the first surface. A cap wafer, having an inner and an outer surface, is bonded with the inner surface to the first surface of the functional wafer. A frame structure surrounding the device structures is arranged between functional wafer and cap wafer. Connection posts are connecting the device pads on the first surface to inner cap pads on the inner surface. Electrically conducting vias are guided through the cap wafer connecting inner cap pads on the inner surface and package pads on the outer surface of the cap wafer.

An integrated CMOS-MEMS device includes a first substrate having a CMOS device, a second substrate having a MEMS device, an insulator layer disposed between the first substrate and the second substrate, a dischargeable ground-contact, an electrical bypass structure, and a contrast stress layer. The first substrate includes a conductor that is conductively connecting to the CMOS devices. The electrical bypass structure has a conducting layer conductively connecting this conductor of the first substrate with the dischargeable ground-contact through a process-configurable electrical connection. The contrast stress layer is disposed between the insulator layer and the conducting layer of the electrical bypass structure.

The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.

An integrated semiconductor device includes: a MEMS structure; an ASIC electronic circuit; and conductive interconnection structures electrically coupling the MEMS structure to the ASIC electronic circuit. The MEMS structure and the ASIC electronic circuit are integrated starting from a same substrate including semiconductor material; wherein the MEMS structure is formed at a first surface of the substrate, and the ASIC electronic circuit is formed at a second surface of the substrate, vertically opposite to the first surface in a direction transverse to a horizontal plane of extension of the first surface and of the second surface.