B81C1/00047

Method for manufacturing a polysilicon SOI substrate including a cavity

A method for manufacturing a polysilicon SOI substrate including a cavity. The method includes: providing a silicon substrate including a sacrificial layer thereon; producing a first polysilicon layer on the sacrificial layer; depositing a structuring layer on the first polysilicon layer; introducing trenches through the structuring layer, the first polysilicon layer, and the sacrificial layer up to the silicon substrate; producing a cavity in the silicon substrate by etching, an etching medium being conducted thereto through the trenches; producing a second polysilicon layer on the first polysilicon layer, the trenches being thereby closed. A micromechanical device is also described.

PRESSURE SENSOR, IN PARTICULAR A MICROPHONE WITH IMPROVED LAYOUT

An electromechanical pressure sensor system, in particular microphone type, including an electromechanical transducer, signal processing device, a substrate for receiving at least one support of the electromechanical transducer and/or signal processing device, a protective cover arranged on the upper face of the substrate, the support of the electromechanical transducer and/or signal processing device being housed in at least one cavity located on the lower face of the substrate.

METHOD FOR PROCESSING SILICON WAFER WITH THROUGH CAVITY STRUCTURE
20190233280 · 2019-08-01 · ·

A method for processing a silicon wafer with a through cavity structure. The method is operated in accordance with the following sequence: performing ion implantation on a silicon wafer or pattern wafer; implanting a dummy substrate; bonding the silicon wafer to the pattern wafer; performing grinding and polishing, and thinning the pattern wafer to a depth exposing the pattern; bonding; and peeling the dummy substrate. Compared with the prior art, the present invention is standard in operation, and the product quality can be effectively guaranteed. The product has high cost performance and excellent comprehensive technical effect. The present invention has expectable relatively large economic values and social values.

Hermetically sealed package for mm-wave molecular spectroscopy cell

Disclosed examples provide gas cells and a method of fabricating a gas cell, including forming a cavity in a first substrate, forming a first conductive material on a sidewall of the cavity, forming a glass layer on the first conductive material, forming a second conductive material on a bottom side of a second substrate, etching the second conductive material to form apertures through the second conductive material, forming conductive coupling structures on a top side of the second substrate, and bonding a portion of the bottom side of the second substrate to a portion of the first side of the first substrate to seal the cavity.

Method of forming space for use in analysis devices

A method of forming a space includes a step of tenting, on a substrate having a recessed portion, a dry film including a dry film material that is to be a top plate on the recessed portion. The step of tenting the dry film includes a press period and a release period and performs a press-release cycle of the press period and the release period a plurality of times, a pressed state in which the dry film is pressed against the substrate by using a pressing member is maintained during the press period, and a released state in which the pressed state is released is maintained during the release period.

Microstructured substrate

A microstructured substrate includes a plurality of at least one elementary microstructure. An electrical storage device, and more particularly an all-solid-state battery, can include the microstructured substrate.

Silicon on nothing devices and methods of formation thereof

In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.

MICROELECTROMECHANICAL SYSTEM (MEMS) STRUCTURE AND METHOD OF FORMATION
20190204586 · 2019-07-04 ·

A microelectromechanical system (MEMS) structure includes at least first and second metal vias. Each of the first and second metal vias includes a respective planar metal layer having a first thickness and a respective post formed from the planar metal layer. The post has a sidewall, and the sidewall has a second thickness greater than 14% of the first thickness.

METHOD FOR FORMING MULTI-DEPTH MEMS PACKAGE
20190161342 · 2019-05-30 ·

The present disclosure relates to a MEMS package having a cap substrate with different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, with the hard mask in place, an etch is performed to the cap substrate such that an uncovered portion of a bottom surface of the first trench is recessed while a covered portion of the bottom surface of the first trench is non-altered to form a stopper within the first trench. Then, the front side of the cap substrate is bonded to a device substrate, enclosing the first trench over a first MEMS device.

Semiconductor structure and method for forming the same

A semiconductor structure includes a substrate, a MEMS substrate, a dielectric structure between the substrate and the MEMS substrate, a cavity in the dielectric structure, an electrode over the substrate, and a protrusion disposed in the cavity. The MEMS substrate includes a movable membrane, and the cavity is sealed by the movable membrane. A height of the protrusion is less than a depth of the cavity.