A preparation method of a bionic adhesive material with a tip-expanded microstructural array includes the following steps: machining through-holes on a metal sheet; modifying morphology of a through-hole by electroplating, using the metal sheet in step 1 as an electroplating cathode, and arranging the electroplating cathode and an electroplating anode in parallel to prepare a hyperboloid-like through-hole array assembly, fitting a lower surface of the hyperboloid-like through-hole array assembly tightly to an upper surface of a substrate assembly to prepare a through-hole assembly of a mold; and filling the mold assembly with a polymer, curing, and demolding to obtain the adhesive material with the tip-expanded microstructural array.

A micro-electro-mechanical system (MEMS) package structure and a method for fabricating the MEMS package structure. The MEMS package structure includes a MEMS die (200) and a device wafer (100). A control unit and an interconnection structure (300) are formed in the device wafer (100), and a first contact pad (410) and an input-output connecting member (420) are formed on a first bonding surface (100a) of the device wafer (100). The MEMS die (200) is coupled to the first bonding surface (100a) through a bonding layer (500). The MEMS die (200) includes a closed micro-cavity (220) and a second contact pad (220). The first contact pad (410) is electrically connected to a corresponding second contact pad (220). An opening (510) that exposes the input-output connecting member (420) is formed in the bonding layer (500). The MEMS package structure allows electrical interconnection between the MEMS die (200) and the device wafer (100) with a reduced package size, compared to those produced by existing integration techniques. In addition, function integration ability of the package structure is improved by integrating a plurality of MEMS dies of the same or different structures and functions on the same device wafer.

Embodiments of the present disclosure are directed toward through-silicon via (TSV)-based devices and associated techniques and configurations. In one embodiment, an apparatus includes a die having active circuitry disposed on a first side of the die and a second side disposed opposite to the first side, a bulk semiconductor material disposed between the first side and the second side of the die and a device including one or more of a capacitor, resistor or resonator disposed in the bulk semiconductor material, the capacitor, resistor or resonator including one or more TSV structures that extend through the bulk semiconductor material, an electrically insulative material disposed in the one or more TSV structures and an electrode material or resistor material in contact with the electrically insulative material within the one or more TSV structures.

A microelectromechanical systems (MEMS) device may be provided with one or more sintered electrical contacts. The MEMS device may be a MEMS actuator or a MEMS sensor. The sintered electrical contacts may be silver-paste metalized electrical contacts. The sintered electrical contacts may be formed by depositing a sintering material such as a metal paste, a metal preform, a metal ink, or a metal powder on a wafer of released MEMS devices and heating the wafer so that the deposited sintering material diffuses into a substrate of the device, thereby making electrical contact with the device. The deposited sintering material may break through an insulating layer on the substrate during the sintering process. The MEMS device may be a multiple degree of freedom actuator having first and second MEMS actuators that facilitate autofocus, zoom, and optical image stabilization for a camera.

A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.

A vacuum sealed MEMS and CMOS package and a process for making the same may include a capping wafer having a surface with a plurality of first cavities, a first device having a first surface with a second plurality of second cavities, a hermetic seal between the first surface of the first device and the surface of the capping wafer, and a second device having a first surface bonded to a second surface of the first device. The second device is a CMOS device with conductive through vias connecting the first device to a second surface of the second device, and conductive bumps on the second surface of the second device. Conductive bumps connect to the conductive through vias and wherein a plurality of conductive bumps connect to the second device. The hermetic seal forms a plurality of micro chambers between the capping wafer and the first device.

Provided herein is a method including bonding a first oxide layer on a handle substrate to a second oxide layer on a complementary metal oxide semiconductor (“CMOS”), wherein the fusion bonding forms a unified oxide layer including a diaphragm overlying a cavity on the CMOS. The handle substrate is removed leaving the unified oxide layer. A piezoelectric film stack is deposited over the unified oxide layer. Vias are formed in the piezoelectric film stack and the unified oxide layer. An electrical contact layer is deposited, wherein the electrical contact layer electrically connects the piezoelectric film stack to an electrode on the CMOS.

Embodiments of the application provide a MEMS chip and an electrical packaging method for a MEMS chip. The MEMS chip includes a MEMS device layer, a first isolating layer located under the MEMS device layer, and a first conducting layer located under the first isolating layer. At the first isolating layer, there are a corresponding quantity of first conductive through holes in locations corresponding to conductive structures in a first region and in locations corresponding to electrodes in a second region. At the first conducting layer, there are M electrodes spaced apart from one another, and the M electrodes are respectively connected to M of the first conductive through holes. At the first conducting layer, electrodes in locations corresponding to at least some of the conductive structures in the first region are electrically connected in a one-to-one correspondence to electrodes in locations corresponding to at least some of the electrodes in the second region.

A micromachined tunable capacitor. A pair of first and second MEMS fabricated flexures are flexibly coupled to a piezo actuator drive element configured wherein a stress or strain induced by the piezo actuator drive element urges a first movable capacitor plate element a predetermined distance toward or away from a second capacitor plate element proportional to a predetermined voltage signal.

A semiconductor device includes a microelectromechanical system (MEMS) die, an encapsulation material, a via element, a non-conductive lid, and a conductive layer. The encapsulation material laterally surrounds the MEMS die. The via element extends through the encapsulation material. The non-conductive lid is over the MEMS die and defines a cavity. The conductive layer is over the MEMS die and the encapsulation material and is electrically coupled to the via element.