Patent classifications
B81C1/00531
MEMS DEVICE, MANUFACTURING METHOD OF THE SAME, AND INTEGRATED MEMS MODULE USING THE SAME
A MEMS device is provided. The MEMS device includes a substrate having at least one contact, a first dielectric layer disposed on the substrate, at least one metal layer disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the metal layer and having a recess structure, and a structure layer disposed on the second dielectric layer and having an opening. The opening is disposed on and corresponds to the recess structure, and the cross-sectional area at the bottom of the opening is smaller than the cross-sectional area at the top of the recess structure. The MEMS device also includes a sealing layer, and at least a portion of the sealing layer is disposed in the opening and the recess structure. The second dielectric layer, the structure layer, and the sealing layer define a chamber.
Semiconductor device having silicon layer with trench
A semiconductor device includes: a silicon layer in which a trench is disposed; a surface structure portion disposed on the silicon layer at a position distant from the trench and having a surface provided by a metal layer; and a low electric conductivity portion disposed on the surface of the metal layer or in a part of the resist disposed on the trench side of the metal layer, and having an electric conductivity lower than at least a part of the metal layer covering a trench side portion of the surface of the metal layer.
Method and apparatus for manufacturing microfluidic chip with femtosecond plasma grating
The present disclosure discloses a method and apparatus for manufacturing a microfluidic chip with a femtosecond plasma grating. The method is characterized in that two or more beams of femtosecond pulse laser act on quartz glass together at a certain included angle and converge in the quartz glass, and when pulses achieve synchronization in time domain, the two optical pulses interfere; Benefited by constraint of an interference field, only one optical filament is formed in one interference period; and numbers of optical filaments are arranged equidistantly in space to form the plasma grating. The apparatus for manufacturing the microfluidic chip includes a plasma grating optical path, a microchannel processing platform, and a hydrofluoric acid ultrasonic cell.
Semiconductor device and method of manufacturing thereof
A method of manufacturing a semiconductor device includes providing a semiconductor layer having a first-type region and a second-type region that are stacked and interface with each other to form a p-n junction, the first-type region defining a first side of the semiconductor layer and the second-type region defining a second side of the semiconductor layer. The method further includes providing an insulating layer on the second side of the semiconductor layer and etching the semiconductor layer from the first side of the semiconductor layer toward the second side of the semiconductor layer to form a trench. The first-type region corresponds to one of a n-type region and a p-type region, and the second-type region corresponds to the other of the n-type region and the p-type region.
Method for forming MEMS cavity structure
The present invention relates to the field of semiconductor technology and provides a method for forming an MEMS cavity structure, which can improve process yield for MEMS integration and encapsulation for functional stability and reliability of the MEMS structure. The method includes steps of: forming an adhesion material layer on a bottom layer; forming a bottom layer on a substrate; forming a adhesion material layer on the bottom layer; forming a support structure and a sacrificial layer that is filled in a space surrounded by the support structure on the adhesion material layer; forming a capping layer on the support structure and the sacrificial layer, and the bottom layer, the support structure and the capping layer together defining a cavity; and releasing the sacrificial layer and the adhesion material layer to form the cavity structure.
Optical memory devices using a silicon wire grid polarizer and methods of making and using
Long term optical memory includes a storage medium composed from an array of silicon nanoridges positioned onto the fused silica glass. The array has first and second polarization contrast corresponding to different phase of silicon. The first polarization contrast results from amorphous phase of silicon and the second polarization contrast results from crystalline phase of silicon. The first and second polarization states are spatially distributed over plurality of localized data areas of the storage medium.
Method and device for a carrier proximity mask
A carrier proximity mask and methods of assembling and using the carrier proximity mask may include providing a first carrier body, second carrier body, and set of one or more clamps. The first carrier body may have one or more openings formed as proximity masks to form structures on a first side of a substrate. The first and second carrier bodies may have one or more contact areas to align with one or more contact areas on a first and second sides of the substrate. The set of one or more clamps may clamp the substrate between the first carrier body and the second carrier body at contact areas to suspend work areas of the substrate between the first and second carrier bodies. The openings to define edges to convolve beams to form structures on the substrate.
Semiconductor ICF Target Processing
A method of manufacturing a semiconductor ICF target is described. On an n-type silicon wafer a plurality of hard mask layers are etched to a desired via pattern. Then isotropically etching hemispherical cavities, lithographically patterning the hard mask layers, conformally depositing ablator/drive material(s) and shell layer material(s), inserting hollow silicon dioxide fuel spheres in the hemisphere cavities, thermally bonding a mating wafer with matching hemisphere cavities and etching in ethylene diamine-pryrocatechol-water mixture to selectively remove n-type silicon and liberate the spherical targets.
Reduced MEMS cavity gap
Provided herein is a method including forming a MEMS cap. A cavity is formed in the MEMS cap wafer, and a bond material is deposited on the MEMS cap wafer, wherein the bond material lines the cavity after the depositing. The MEMS cap wafer is bonded to a MEMS device wafer, wherein the bond material forms a bond between the MEMS cap wafer and the MEMS device wafer. A MEMS device is formed in the MEMS device wafer. The bond material is removed from the cavity.
Micro-electro-mechanical system (MEMS) structures and design structures
Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.