The present disclosure relates to a microphone. In some embodiments, the microphone may comprise a diaphragm, a backplate, and a sidewall stopper. The diaphragm has a venting hole disposed therethrough. The backplate is disposed over and spaced apart from the diaphragm. The sidewall stopper is disposed along a sidewall of the diaphragm exposing to the venting hole. Thus, the sidewall stopper is not limited by a distance between the movable part and the stable part of the microphone. Also, the sidewall stopper does not alternate the shape of movable part, and thus will less likely introduce crack to the movable part. In some embodiments, the sidewall stopper may be formed like a sidewall stopper by a self-alignment process, such that no extra mask is needed.

The present disclosure relates to a method of manufacturing a MEMS device. In some embodiments, a first interlayer dielectric layer is formed over a substrate, and a diaphragm is formed over the first interlayer dielectric layer. Then, a second interlayer dielectric layer is formed over the diaphragm. A first etch is performed to form an opening through the second interlayer dielectric layer and the diaphragm and reaching into an upper portion of the first interlayer dielectric layer. A second etch is performed to the first interlayer dielectric layer and the second interlayer dielectric layer to form recesses above and below the diaphragm and to respectively expose a portion of a top surface and a portion of a bottom surface of the diaphragm. A sidewall stopper is formed along a sidewall of the diaphragm into the recesses of the first interlayer dielectric layer and the second interlayer dielectric layer.

A system includes a semiconductor substrate having a first cavity. The semiconductor substrate forms a pedestal adjacent the first cavity. A device overlays the pedestal and is bonded to the semiconductor substrate by metal within the first cavity. A plurality of second cavities are formed in a surface of the pedestal beneath the device, wherein the second cavities are smaller than the first cavity. In some of these teachings, the second cavities are voids. In some of these teachings, the metal in the first cavity comprises a eutectic mixture. The structure relates to a method of manufacturing in which a layer providing a mask to etch the first cavity is segmented to enable easy removal of the mask-providing layer from the area over the pedestal.

An interposer substrate, a MEMS device and a corresponding manufacturing method. The interposer substrate is equipped with a front side and a rear side, a cavity starting from the rear side, which extends up to a first depth, a through-opening and a sunken area situated between the cavity and the through-opening, which is sunken from the rear side up to a second depth in relation to the rear side, the first depth being greater than the second depth.

A method for manufacturing a Bulk Acoustic Wave (BAW) resonator module is provided. The method includes providing a substrate, defining a platform region on the surface of the substrate, disposing a BAW resonator device on the surface of the substrate within the platform region, and etching an isolation trench circumscribing at least 50% of a circumference of the platform region.

The present invention relates to the unexpected discovery of novel methods of preparing nanodevices and/or microdevices with predetermined patterns. In one aspect, the methods of the invention allow for engineering structures and films with continuous thickness equal to or less than 50 nm.

A method for producing a reflection-reducing layer system is disclosed. In an embodiment, a method includes depositing an organic layer on the substrate, generating a nanostructure in the organic layer by a plasma etching process, applying a cover layer to the nanostructure, wherein the organic layer, the nanostructure and the cover layer together form a reflection-reducing structure, wherein the cover layer comprises an inorganic material or an organosilicon compound, and wherein the cover layer is at least 5 nm thick and performing a post-treatment after applying the cover layer, wherein a material of the organic layer is at least partially removed, decomposed or chemically converted, and wherein an effective refractive index n.sub.eff,2 of the reflection-reducing structure after the post-treatment is smaller than an effective refractive index n.sub.eff,1 of the reflection-reducing structure before the post-treatment.

A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

Long term optical memory includes a storage medium composed from an array of silicon nanoridges positioned onto the fused silica glass. The array has first and second polarization contrast corresponding to different phase of silicon. The first polarization contrast results from amorphous phase of silicon and the second polarization contrast results from crystalline phase of silicon. The first and second polarization states are spatially distributed over plurality of localized data areas of the storage medium.

Methods for forming an electrode structure, which can be used as a biosensor, are provided in which the electrode structure has non-random topography located on one surface of an electrode base. In some embodiments, an electrode structure is obtained that contains no interface between the non-random topography of the electrode structure and the electrode base of the electrode structure. In other embodiments, electrode structures are obtained that have an interface between the non-random topography of the electrode structure and the electrode base of the electrode structure.