The present description concerns a method of manufacturing a microelectromechanical device, including the following successive steps: providing an SOI structure comprising a first semiconductor layer on an insulating layer; forming a second semiconductor layer by epitaxy on top of and in contact with the upper surface of the first semiconductor layer; transferring and bonding, by molecular bonding, a third semiconductor layer onto and in contact with the upper surface of the second semiconductor layer; and forming trenches vertically extending from the upper surface of the third semiconductor layer all the way to the upper surface of the insulating layer, said trenches laterally delimiting a mechanical element of the device.

Various embodiments of the present disclosure are directed towards an integrated chip including an interconnect structure overlying a semiconductor substrate. An upper dielectric structure overlies the interconnect structure. A microelectromechanical system (MEMS) substrate overlies the upper dielectric structure. A cavity is defined between the MEMS substrate and the upper dielectric structure. The MEMS substrate comprises a movable membrane over the cavity. A cavity electrode is disposed in the upper dielectric structure and underlies the cavity. A plurality of stopper structures is disposed in the cavity between the movable membrane and the cavity electrode. A dielectric protection layer is disposed along a top surface of the cavity electrode. The dielectric protection layer has a greater dielectric constant than the upper dielectric structure.

An integrated circuit assembly including a first wafer bonded to a second wafer with an oxide layer, wherein a first surface of the first wafer is bonded to a first surface of the second wafer. The assembly can include a bonding oxide on a second surface of the second wafer, wherein a surface of the bonding oxide is polished. The assembly can further include a shim secured to the bonding oxide on the second surface of the second wafer to reduce bow of the circuit assembly.

In a microelectromechanical component according to the invention, at least one microelectromechanical element (5), electrical contacting elements (3) and an insulation layer (2.2) and thereon a sacrificial layer (2.1) formed with silicon dioxide are formed on a surface of a CMOS circuit substrate (1) and the microelectromechanical element (5) is arranged freely movably in at least a degree of freedom. At the outer edge of the microelectromechanical component, extending radially around all the elements of the CMOS circuit, a gas- and/or fluid-tight closed layer (4) which is resistant to hydrofluoric acid and is formed with silicon, germanium or aluminum oxide is formed on the surface of the CMOS circuit substrate (1).

A sensor membrane structure is provided. The sensor membrane structure includes a substrate, a first insulating layer, and a device layer. The substrate has a first surface and a second surface that is opposite to the first surface. A cavity is formed on the first surface, an opening is formed on the second surface, and the cavity communicates with the opening. The cavity and the opening penetrate the substrate in a direction that is perpendicular to the first surface. The first insulating layer is disposed on the first surface of the substrate. The device layer is disposed on the first insulating layer.

A micro-device including at least one first element comprising at least: a portion of material corresponding to a compound of at least one semi-conductor and at least one metal, first and second protective layers each covering one of two opposite faces of said portion of material, such that the first and second protective layers are in direct contact with said portion of material, that the first protective layer comprises at least one first material able to withstand an HF etching, that the second protective layer comprises at least one second material able to withstand the HF etching, and that at least one of the first and second materials able to withstand the HF etching includes the semi-conductor.

A MEMS microphone and a manufacturing method thereof. The method comprises: sequentially forming a first isolation layer, a diaphragm, and a second isolation layer on a substrate; sequentially forming a first protective layer, a backplate electrode, and a second protective layer on the second isolation layer; forming a release hole penetrating through the first protective layer, the backplate electrode, and the second protective layer; forming an acoustic cavity penetrating through the substrate; releasing the diaphragm through the acoustic cavity and the release hole; and forming a groove on a surface of the first isolation layer, wherein the diaphragm conformally covers the surface of the first isolation layer, thereby forming a spring structure at a position of the groove.

A MEMS structure includes a substrate, an inter-dielectric layer on a front side of the substrate, a MEMS component on the inter-dielectric layer, and a chamber disposed within the inter-dielectric layer and through the substrate. The chamber has an opening at a backside of the substrate. An etch stop layer is disposed within the inter-dielectric layer. The chamber has a ceiling opposite to the opening and a sidewall joining the ceiling. The sidewall includes a portion of the etch stop layer.

An integrated circuit assembly including a first wafer bonded to a second wafer with an oxide layer, wherein a first surface of the first wafer is bonded to a first surface of the second wafer. The assembly can include a bonding oxide on a second surface of the second wafer, wherein a surface of the bonding oxide is polished. The assembly can further include a shim secured to the bonding oxide on the second surface of the second wafer to reduce bow of the circuit assembly.

A semiconductor package structure includes an electronic device having an exposed region adjacent to a first surface, a dam surrounding the exposed region of the semiconductor die and disposed on the first surface, the dam having a top surface away from the first surface, an encapsulant encapsulating the first surface of the electronic device, exposing the exposed region of the electronic device. A surface of the dam is retracted from a top surface of the encapsulant. A method for manufacturing the semiconductor package structure is also provided.