A MEMS device includes a substrate and a MEMS electrode. The MEMS electrode includes a movable electrode finger relatively movable with respect to the substrate, a fixed electrode finger disposed at an interval from the movable electrode finger, and a beam portion cantilevered on the substrate and connecting the fixed electrode finger to the substrate. The beam portion includes a first portion having a first thermal expansion coefficient and a second portion disposed adjacent to the first portion and having a second thermal expansion coefficient different from the first thermal expansion coefficient. The beam portion is deformed due to a difference between thermal stress generated in the first portion and thermal stress generated in the second portion, and the interval is narrowed due to deformation of the beam portion as compared with an interval formed before the deformation of the beam portion.

Microstructure plating systems and methods are described herein. One method includes depositing a plating-resistant material between a microstructure and a bonding layer, wherein the microstructure comprises a plating process base material and immersing the microstructure in a plating solution.

An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.

Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

A method for manufacturing a MEMS double-layer suspension microstructure comprises steps of: forming a first film body on a substrate, and a cantilever beam connected to the substrate and the first film body; forming a sacrificial layer on the first film body and the cantilever beam; patterning the sacrificial layer located on the first film body to manufacture a recessed portion used for forming a support structure, the bottom of the recessed portion being exposed of the first film body; depositing a dielectric layer on the sacrificial layer; patterning the dielectric layer to manufacture a second film body and the support structure, the support structure being connected to the first film body and the second film body; and removing the sacrificial layer to obtain the MEMS double-layer suspension microstructure.

An apparatus may include a first support covered with at least one ALD precursor and/or at least one MLD precursor, and a second support covered with at least one ALD precursor and/or at least one MLD precursor which is/are complementary to the ALD precursor and/or MLD precursor of the first support. The first support is at least partly joined to the second support by an atomic bond between the ALD precursor of the first support and the ALD precursor of the second support or between the MLD precursor of the first support and the MLD precursor of the second support in such a way that an ALD layer or an MLD layer is formed.

In an example of a method for making a nano-structure, an aluminum layer is partially anodized to form a porous anodic alumina structure. The aluminum layer is positioned on an oxidizable material layer. The porous anodic alumina structure is exposed to partial anisotropic etching to form tracks within the porous anodic alumina structure. A remaining portion of the aluminum layer is further anodized to form paths where the tracks are formed. The oxidizable material layer is anodized to from an oxide, where the oxide grows through the paths formed within the porous anodic alumina structure to form a set of super nano-pillars.

A nano-structure includes an oxidized layer, and at least two sets of super nano-pillars positioned on the oxidized layer. Each of the at least two sets of super nano-pillars includes a plurality of super nano-pillars, where each set is separated a spaced distance from each other set.

Microelectromechanical system (MEMS) devices and methods for forming MEMS devices are provided. The MEMS devices include a substrate, an anchored structure fixedly coupled to the substrate, and a movable structure resiliently coupled to the substrate. The movable structure has an opening formed therethrough and is positioned such that the anchored structure is at least partially within the opening and is in a capacitor-forming relationship with the movable structure. The movable structure comprises a movable structure finger extending only partially across the opening.

The present invention relates to a polymeric substrate having a glass-like surface, in particular an etched-glass-like surface and to a chip made of at least one such polymeric substrate. The present invention also relates to a method of providing a polymeric substrate with an etched-glass-like surface. Moreover, the present invention relates to a kit for manufacturing a chip using such polymeric substrate. Moreover, the present invention relates to the use of a polymeric substrate having a glass-like surface, in particular an etched-glass-like surface for manufacturing a chip.