Patent classifications
B81C2203/036
CAPACITIVE MICROPHONE SENSOR DESIGN AND FABRICATION METHOD FOR ACHIEVING HIGHER SIGNAL TO NOISE RATIO
A capacitive transducer or microphone includes a first substrate of one or more layers and which includes a first surface, a first cavity in the first surface, and a mesa diaphragm that spans the first cavity. The capacitive transducer or microphone includes a second substrate fixed to the first substrate. The second substrate has one or more layers which includes a second cavity having a nonplanar (e.g., contoured or structured or stepped) bottom surface that faces the mesa diaphragm. A shape or relief of the bottom surface of the cavity may advantageously be, to at least some degree, complementary to a deformed shape of the diaphragm. The second substrate may include one or more acoustic holes, non-uniformly distributed thereacross. One or more vents may vent the second cavity.
MICROELECTRONICS PACKAGE WITH VERTICALLY STACKED MEMS DEVICE AND CONTROLLER DEVICE
The present disclosure relates to a microelectronics package with a vertically stacked structure of a microelectromechanical systems (MEMS) device and a controller device. The MEMS device includes a MEMS component, a MEMS through-via, and a MEMS connecting layer configured to electrically connect the MEMS component with the MEMS through-via. The controller device includes a controlling component, a controller through-via, and a controller connecting layer configured to electrically connect the controlling component with the controller through-via. The controller through-via is in contact with the MEMS through-via, such that the controlling component in the controller device is configured to control the MEMS component in the MEMS device.
Method for producing an at least partly packaged semiconductor wafer
A method for producing an at least partially housed semiconductor wafer is provided. This method comprises the steps of providing a semiconductor wafer which has components on its upper face and providing a cover disc, the surface of which at least partially covers the semiconductor wafer. After functionalizing the surface of the cover disc to form a functional layer, the upper face of the semiconductor wafer and the surface of the cover disc are joined together, followed by activating the functional layer using simultaneous chemical bonding of the semiconductor wafer and the cover disc such that the cover disc forms a housing for the semiconductor wafer.
Wafer-scale assembly of insulator-membrane-insulator devices for nanopore sensing
Described herein are nanopore devices as well as methods for assembling a nanopore device including one or more nanopores that can be used to detect molecules such as nucleic acids, amino acids (proteins), and the like. Specifically, a nanopore device includes an insulating layer that reduces electrical noise and thereby improves the sensing resolution of the one or more nanopores integrated within the nanopore device.
Stabilized transient liquid phase metal bonding material for hermetic wafer level packaging of MEMS devices
In described examples, a transient liquid phase (TLP) metal bonding material includes a first substrate and a base metal layer. The base metal layer is disposed over at least a portion of the first substrate. The base metal has a surface roughness (Ra) of between about 0.001 to 500 nm. Also, the TLP metal bonding material includes a first terminal metal layer that forms an external surface of the TLP metal bonding material. A metal fuse layer is positioned between the base metal layer and the first terminal metal layer. The TLP metal bonding material is stable at room temperature for at least a predetermined period of time.
INTEGRATION TECHNIQUES FOR MICROMACHINED pMUT ARRAYS AND ELECTRONICS USING THERMOCOMPRESSION BONDING, EUTECTIC BONDING, AND SOLDER BONDING
The present disclosure provides methods to integrate piezoelectric micromachined ultrasonic transducer (pMUT) arrays with an application-specific integrated circuit (ASIC) using thermocompression or eutectic/solder bonding. In an aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using thermocompression, wherein any set of individual PMUTs of PMUT array is addressable. In another aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using eutectic or solder bonding, wherein any set of individual PMUTs of the PMUT array is addressable.
Integrated piezoelectric microelectromechanical ultrasound transducer (PMUT) on integrated circuit (IC) for fingerprint sensing
Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.
Bonded structures
A bonded structure is disclosed. The bonded structure includes a first element and a second element that is bonded to the first element along a bonding interface. The bonding interface has an elongate conductive interface feature and a nonconductive interface feature. The bonded structure also includes an integrated device that is coupled to or formed with the first element or the second element. The elongate conductive interface feature has a recess through a portion of a thickness of the elongate conductive interface feature. A portion of the nonconductive interface feature is disposed in the recess.
MEMS device with reduced electric charge, cavity volume and stiction
A method includes forming a first mask on a first portion of a first surface of a substrate, forming a second mask on the first mask and further forming the second mask on a second portion of the first surface of the substrate, and etching an exposed portion of the first surface of the substrate and removing the second mask. According to some embodiments, an exposed portion of the first surface of the substrate is etched and the first mask is removed. An oxide layer is formed on the first surface of the substrate. A third mask is formed on the oxide layer except for a portion of the oxide layer corresponding to bumpstop features. The portion of the oxide layer corresponding to the bumpstop features is removed. An exposed portion of the first surface of the substrate is etched and the third mask is removed.
Microfabricated ultrasonic transducer having individual cells with electrically isolated electrode sections
An ultrasonic transducer includes a membrane, a bottom electrode, and a plurality of cavities disposed between the membrane and the bottom electrode, each of the plurality of cavities corresponding to an individual transducer cell. Portions of the bottom electrode corresponding to each individual transducer cell are electrically isolated from one another. Each portion of the bottom electrode corresponds to each individual transducer that cell further includes a first bottom electrode portion and a second bottom electrode portion, the first and second bottom electrode portions electrically isolated from one another.