Method for producing an at least partly packaged semiconductor wafer

Abstract

A method for producing an at least partially housed semiconductor wafer is provided. This method comprises the steps of providing a semiconductor wafer which has components on its upper face and providing a cover disc, the surface of which at least partially covers the semiconductor wafer. After functionalizing the surface of the cover disc to form a functional layer, the upper face of the semiconductor wafer and the surface of the cover disc are joined together, followed by activating the functional layer using simultaneous chemical bonding of the semiconductor wafer and the cover disc such that the cover disc forms a housing for the semiconductor wafer.

Claims

1. A method for producing an at least partially housed semiconductor wafer, comprising the steps of: providing a semiconductor wafer which has components on an upper face; providing a cover disc, a surface of which at least partially covers the semiconductor wafer, functionalizing the surface of the cover disc by forming a functional layer by plasma treating the surface of the cover disc and activating the functional layer by an irradiation with light, immediately after activating the functional layer, joining the upper face of the semiconductor wafer and the surface of the cover disc for chemical bonding of the semiconductor wafer and the cover disc by forming covalent bonds between molecules of the functional layer and the semiconductor wafer such that the cover disc forms a housing for the semiconductor wafer.

2. The method according to claim 1, wherein the plasma treating comprises moving the surface of the cover disc beneath a plasma rod, wherein the number and speed of the movements of the cover disc beneath the plasma rod define a layer thickness of the functional layer.

3. The method according to claim 1, wherein activating the functional layer comprises irradiation using light of a predetermined wavelength, preferably in the UV range.

4. The method according to claim 1, wherein the process steps are carried out in a sealed process chamber, wherein the composition and pressure of a gas atmosphere can be adjusted during the activation of the functional layer and the joining of the semiconductor wafer and the cover disc.

5. The method according to claim 1, wherein the cover disc is structured on an upper face which faces the semiconductor wafer such that individual component groups are arranged on the upper face of the semiconductor wafer in cavities on the surface of the cover disc.

6. The method according to claim 1, wherein the semiconductor wafer is thinned from an opposite side of the upper face and can subsequently be contacted from the opposite side.

7. The method according to claim 6, wherein individual assemblies are preferably separated by sawing, preferably along structural elements on the cover disc.

8. The method according to claim 1, wherein the components of the semiconductor wafer are provided in the form of microelectronic or micromechanical components which are connected to electronic components, preferably high-frequency components.

9. The method according to claim 1, wherein the cover disc is used as a carrier during rear face processing of the semiconductor wafer.

Description

(1) Some exemplary embodiments will be explained below in greater detail with reference to the drawings, in which:

(2) FIG. 1A is a schematic side view of a first process step of a first embodiment of a method according to the invention,

(3) FIG. 1B is a side view of a second process step of the first embodiment,

(4) FIG. 1C is a side view of a third process step of the first embodiment,

(5) FIG. 2A is a side view of a first process step of a method according to the invention in accordance with a second embodiment,

(6) FIG. 2B is a side view of a second process step of the second embodiment,

(7) FIG. 2C is a side view of a third process step of the second embodiment,

(8) FIG. 3A is a side view of a further process step of the method according to the invention,

(9) FIG. 3B is a side view of a further process step of the method according to the invention.

(10) In the figures, identical or functionally identical components are provided with the same reference numerals.

(11) A first embodiment of a method according to the invention for producing a housed semiconductor wafer will be described below with reference to FIG. 1A to 1C. FIG. 1A shows that a cover disc 2 is provided, the surface 4 of which typically corresponds to the dimensions of a semiconductor wafer. In other embodiments, however, the size of the cover disk 2 may be selected so as to be smaller, for example, such that a semiconductor wafer is only partially covered. A plasma rod 6 is arranged on the surface 4 of the cover disc 2, which plasma rod can ionize the region between the surface 4 and the plasma rod 6 by means of suitable electrodes such that a carrier gas, which is not shown in FIG. 1A, is ionized and then deposited on the surface 4. Consequently, provided the cover disc 2 is pulled through under the plasma rod 6 one or more times as shown in FIG. 1 using the directional arrow 8, a functional layer 10 is formed, the thickness of which can be influenced by the process management, i.e. the number and speed of the passes of the cover disc 2 beneath the plasma rod 6. Now that the functional layer 10 has been generated having the desired thickness, the functional layer 10 is initially inactive following the plasma treatment.

(12) As shown in FIG. 1B, the functional layer 10, which is formed over the entire surface 4 of the cover disc 2, can be activated by means of light from a light source 12. The light source 12, which emits, for example, light 14 in the near UV range, causes an activation of the functional layer 10 in correspondingly selected lighting conditions.

(13) In the next step, as shown in FIG. 1C, a semiconductor wafer 16 is now provided, a bonding procedure between an upper face 20 of the semiconductor wafer 16 and the functional layer 10 of the cover disc 2 being generated by immediately bringing the cover disc 2 and the semiconductor wafer 16 into contact, covalent bonds of the activated functional layer and the upper face 20 of the semiconductor wafer 16 being produced due to the surface contact. These covalent bonds lead to a permanent chemical bond between the cover disc 2 and the semiconductor wafer 16. The contacting of the cover disc 2 and the semiconductor wafer 16 is shown using the displacement directions 18 and 18′ in FIG. 1C.

(14) The process steps described in conjunction with FIG. 1A to 1C can be used, for example, to provide a housing by means of the cover disc 2 that covers components (not shown in FIG. 1A to 1C) on the upper face 20 of the semiconductor wafer 16. This corresponds to the encapsulation of, for example, optical or electronic components in the electronics industry.

(15) A second embodiment of the method according to the invention will be described below with reference to FIG. 2A to 2C. For clarification, however, the differences to the method described in conjunction with FIG. 1A to 1C are substantially explained.

(16) As can be seen from FIG. 2A, the cover disc 2 is structured on its surface 4 in such a way that corresponding structural elements 22 have been created, between which cavities 24 are formed. The structuring by means of the structural elements 22 can in this case take place in the form of a grid. By means of the plasma rod 6, the functional layer 10 is formed in turn by movement along the directional arrow 8. The functional layer 10 is activated in a process chamber 26 in which the cover disc 2, the semiconductor wafer 16 and the light source 12 are arranged. By supplying a desired gas mixture or adjusting a pressure of the gas mixture, after activation by means of the light source 12, a chemical bond of the cover disk 2 and the semiconductor wafer 16 can now be created by contacting by means of the movement along the displacement directions 18 and 18′, in which bond gas having a desired composition or density is present in the region of the cavities 24.

(17) The result of this process management is shown, in a further enlarged view, in FIG. 2. It can be seen that in the cavities 24, which are delimited by the structural elements 22, a defined atmosphere prevails such that the components indicated by the reference numeral 28 are surrounded by the defined gas atmosphere in the cavity 24. A procedure of this kind can be used both in high-frequency electronics to reduce power losses and in microsystems technology for the production of cavities required for sensors. Thus, a reference pressure chamber in an absolute pressure sensor or a vacuum chamber of an angular rate sensor, for example, can be provided in this way. In high-frequency or power electronics, a gas-filled cavity is also advantageous due to the lower dielectric values.

(18) Further method steps are explained below with reference to FIGS. 3A and 3B.

(19) It is thus shown in FIG. 3A that the semiconductor wafer 16 is thinned from a side opposite the upper face 20 such that rear face metallizations and contacts can be formed. These can lead the components 28 though corresponding vias 30 to rear face electrodes 32.

(20) After a separation, the result of which is shown in an enlarged view in FIG. 3B, a finished electronic component is obtained which is hermetically shielded from and sealed against the environment by means of the housing 34 formed from the material of the cover disc 2. The separation is in this case preferably carried out such that the structural elements 22 are retained in part. Regions in which bonds have been produced by means of the active surface bonding are indicated schematically by reference numeral 36 in FIG. 3B. The cavity 24 can be filled with gas.

(21) In other methods, the cover disc 2 can be used as a carrier during rear face processing of the semiconductor wafer 16, in order produce vias in the semiconductor wafer 16 or to thin the semiconductor wafer 16.

(22) The features indicated above and in the claims and the features which can be seen in the figures can be implemented advantageously both individually and in various combinations. The invention is not limited to the embodiments described, but can be modified in a number of ways within the scope of knowledge of a person skilled in the art.

LIST OF REFERENCE NUMERALS

(23) 2 cover disc 4 surface 6 plasma rod 8 directional arrow 10 functional layer 12 light source 14 light 16 semiconductor wafer 18 displacement directions 20 upper face 22 structural elements 24 cavity 26 process chamber 28 components 30 via 32 rear face electrode 34 housing 36 bonding region