Certain embodiments of the present disclosure relate to a sensor assembly including a housing having a first channel configured to flow a gas in a first direction and a second channel configured to flow the gas in a second direction. The housing is configured to couple to a gas flow assembly. A substrate is disposed within the housing. The substrate has an outer region, an inner region within the first channel, and a middle region between the outer region and the inner region. The substrate further includes electrical contact pads on at least the inner region. A sensor die is coupled to the inner region of the substrate, having an electrical connection to the electrical contact pads. The sensor die is disposed within a gas flow path of the first channel.

Certain embodiments of the present disclosure relate to a sensor assembly including a substrate, a housing, and a sensor die. In certain embodiments, the substrate includes an outer region, an inner region, and a middle region between the outer region and the inner region. In certain embodiments, the substrate includes electrical contact pads on at least the inner region. In certain embodiments, the housing is coupled to the substrate at the middle region or the outer region to provide a hermetic seal. In certain embodiments, the sensor die is coupled to the substrate at the inner region via the electrical contact pads. The sensor die is aligned to the substrate via aligning features that align the sensor die relative to the substrate in at least one of a first plane or a second plane.

Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

A semiconductor device and method of forming such a device includes a MEMS component including one or more MEMS pixels and having a MEMS membrane substrate and a MEMS sidewall. The semiconductor device includes an analog circuit component bonded to the MEMS component, and which includes at least one analog CMOS component within an analog circuit insulative layer, and an analog circuit component substrate. The semiconductor device includes an HPC component bonded to the analog circuit component substrate. The HPC component includes at least one HPC metal component disposed within an HPC insulative layer, at least one bond pad, at least one bond pad via connecting the at least one bond pad and the at least one HPC metal component, and an HPC substrate. Additionally, the semiconductor device includes a DTC component bonded to the HPC substrate, and which includes a DTC die disposed in a DTC substrate.

A method includes forming a bumpstop from a first intermetal dielectric (IMD) layer and forming a via within the first IMD, wherein the first IMD is disposed over a first polysilicon layer, and wherein the first polysilicon layer is disposed over another IMD layer that is disposed over a substrate. The method further includes depositing a second polysilicon layer over the bumpstop and further over the via to connect to the first polysilicon layer. A standoff is formed over a first portion of the second polysilicon layer, and wherein a second portion of the second polysilicon layer is exposed. The method includes depositing a bond layer over the standoff.

A device includes a substrate and an intermetal dielectric (IMD) layer disposed over the substrate. The device also includes a first plurality of polysilicon layers disposed over the IMD layer and over a bumpstop. The device also includes a second plurality of polysilicon layers disposed within the IMD layer. The device includes a patterned actuator layer with a first side and a second side, wherein the first side of the patterned actuator layer is lined with a polysilicon layer, and wherein the first side of the patterned actuator layer faces the bumpstop. The device further includes a standoff formed over the IMD layer, a via through the standoff making electrical contact with the polysilicon layer of the actuator and a portion of the second plurality of polysilicon layers and a bond material disposed on the second side of the patterned actuator layer.

Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.

A microchip includes: a first substrate; a second substrate partially bonded to the first substrate, the second substrate having a main surface and an outer side face; a hollow channel located between the first substrate and the second substrate, the channel extending in a direction along the main surface of the second substrate; a liquid distribution port formed to penetrate the second substrate; a first bonding section that bonds the first substrate to the second substrate to surround the channel when viewed from a direction orthogonal to the main surface; a second bonding section located at a position closer to the outer side face of the second substrate than the first bonding section, and that bonds the first substrate to the second substrate; and an internal space provided between the first substrate and the second substrate, and that communicates with a space outside the first substrate and the second substrate.

An integrated circuit assembly including a first wafer bonded to a second wafer with an oxide layer, wherein a first surface of the first wafer is bonded to a first surface of the second wafer. The assembly can include a bonding oxide on a second surface of the second wafer, wherein a surface of the bonding oxide is polished. The assembly can further include a shim secured to the bonding oxide on the second surface of the second wafer to reduce bow of the circuit assembly.

A micro-electro mechanical system (MEMS) device includes a MEMS substrate, at least one movable element laterally confined within a matrix layer that overlies the MEMS substrate, and a cap substrate bonded to the matrix layer through bonding material portions. A first movable element selected from the at least one movable element is located inside a first chamber that is laterally bounded by the matrix layer and vertically bounded by a first capping surface that overlies the first movable element. The first capping surface includes an array of downward-protruding bumps including respective portions of a dielectric material layer. Each of the downward-protruding bumps has a vertical cross-sectional profile of an inverted hillock. The MEMS device can include, for example, an accelerometer.