Patent classifications
B81C2203/0714
Integrating MEMS structures with interconnects and vias
A conductive layer is deposited into a trench in a sacrificial layer on a substrate. An etch stop layer is deposited over the conductive layer. The sacrificial layer is removed to form a gap. In one embodiment, a beam is over a substrate. An interconnect is on the beam. An etch stop layer is over the beam. A gap is between the beam and the etch stop layer.
Gas sensor MEMS structures and methods of fabrication thereof
A gas sensor, a method of manufacturing a gas sensor, a method for fabricating a micro electro-mechanical system (MEMS) die for a heater or thermopile, and a micro electro-mechanical system (MEMS) die for a heater or thermopile. The gas sensor comprises a first micro electro-mechanical system (MEMS) die comprising a light source; a second MEMS die comprising a light detector; a sample chamber disposes in an optical path between the light source and the light detector; and a holder substrate; wherein the first and second MEMS dies are disposed on the holder substrate in a vertical orientation relative to the holder.
CMOS-MEMS humidity sensor
A CMOS-MEMS humidity sensor includes a complementary metal oxide semiconductor (CMOS) ASIC readout circuit and a microelectromechanical system (MEMS) humidity sensor. The MEMS humidity sensor is provided on the ASIC readout circuit. The ASIC readout circuit includes a substrate, a heating resistor layer located above the substrate, a metal layer located above the heating resistor layer, and dielectric layers. The substrate, the heating resistor layer, and the metal layer are partitioned by dielectric layers. The MEMS humidity sensor includes an aluminum electrode layer, a passivation layer located above the aluminum electrode layer, and a humidity sensitive layer located above the passivation layer. The provision of heating resistors in the ASIC circuit realizes the heating function and satisfies the requirements of the standard CMOS process, so that the CMOS-MEMS integrated humidity sensor can be used stably under low temperature and high humidity conditions.
Process for manufacturing a microelectromechanical interaction system for a storage medium
A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity and a top surface; forming a first interaction region having a second type of conductivity, opposite to the first type of conductivity, in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity, so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.
Hybrid CMOS-MEMS devices adapted for high-temperature operation and method for their manufacture
A silicon carbide based MOS integrated circuit is monolithically integrated with a suspended piezoelectric aluminum nitride member to form a high-temperature-capable hybrid MEMS-over-MOS structure. In the integrated structure, a post-MOS passivation layer of silicon carbide is deposited over the MOS passivation and overlain by a structural layer of the MEMS device. Electrical contact to refractory metal conductors of the MOS integrated circuit is provided by tungsten vias that are formed so as to pass vertically through the structural layer and the post-MOS passivation layer.
Process for manufacturing a microelectromechanical interaction system for a storage medium
A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity (P) and a top surface; forming a first interaction region having a second type of conductivity (N), opposite to the first type of conductivity (P), in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity (N), so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.
Monolithic integrated device
Monolithic integrated device having an architecture that allows an acoustic device to transduce either surface acoustic waves or bulk acoustic waves, comprising: a substrate layer being the base of the device; an inter-layer dielectric disposed on top of the substrate layer; an electronic circuitry substantially formed in the inter-layer dielectric and supported by the substrate layer, the electronic circuitry comprises a plurality of metal layers; and a piezoelectric layer being sandwiched between a top electrode and a bottom electrode within the inter-layer dielectric. The top electrode is an upper metal layer belonging to the electronic circuitry and the bottom electrode is a lower metal layer belonging to the electronic circuitry. To transduce the bulk acoustic waves, the inter-layer dielectric is formed with a top cavity above the top electrode and a bottom cavity below the bottom electrode.
Silicon microphone with suspended diaphragm and system with the same
A silicon microphone with a suspended diaphragm and a system with the same are provided, the microphone comprises: a silicon substrate provided with a back hole therein; a compliant diaphragm disposed above the back hole of the silicon substrate and separated from the silicon substrate; a perforated backplate disposed above the diaphragm with an air gap sandwiched in between; and a precisely defined support mechanism, disposed between the diaphragm and the backplate with one end thereof fixed to the edge of the diaphragm and the other end thereof fixed to the backplate, wherein the diaphragm and the backplate are used to form electrode plates of a variable condenser. The microphone with a suspended diaphragm can improve the repeatability and reproducibility in performance and can reduce the diaphragm stress induced by the substrate.
SEMICONDUCTOR PROCESS
A semiconductor process including the following steps is provided. A wafer is provided. The wafer has a front side and a back side. The wafer has a semiconductor device on the front side. A protection layer is formed on the front side of the wafer. The protection layer covers the semiconductor device. A material of the protection layer includes a photoresist material. A surface hardening treatment process is performed on the protection layer. A first patterning process is performed on the back side of the wafer. The semiconductor process can effectively protect the front side of the wafer during a backside process.
MICROELECTROMECHANICAL DEVICE, METHOD FOR MANUFACTURING A MICROELECTROMECHANICAL DEVICE, AND METHOD FOR MANUFACTURING A SYSTEM ON CHIP USING A CMOS PROCESS
A microelectromechanical systems (MEMS) device is provided and includes a bulk semiconductor substrate, a cavity formed in the bulk semiconductor substrate, a movably suspended mass, a cap structure and a capacitive structure is shown. The movably suspended mass is defined in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity. The cap is structure arranged on the main surface area of the bulk semiconductor substrate. The capacitive structure comprises a first electrode structure arranged on the movably suspended mass and a second electrode structure arranged at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.