Patent classifications
B81C2203/0742
CMOS cap for MEMS devices
A complementary metal oxide semiconductor (CMOS) device embedded with micro-electro-mechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermosensors. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the MEMS sensors in the MEMS region. The CMOS cap includes a base cap with release openings and a seal cap which seals the release openings.
Systems and methods for genome mapping
A system for molecular mapping includes a semiconductor substrate defining a reservoir to receive a sample of molecules and a nanofluidic channel in fluid communication with the reservoir. The system also includes a plurality of electrodes, in electrical communication with the nanofluidic channel, to electrophoretically trap the sample of molecules in the nanofluidic channel. At least one avalanche photodiode is fabricated in the semiconductor substrate and disposed within an optical near-field of the nanofluidic channel to detect fluorescence emission from at least one molecule in the sample of molecules.
CMOS CAP FOR MEMS DEVICES
A complementary metal oxide semiconductor (CMOS) device embedded with micro-electro-mechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermosensors. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the MEMS sensors in the MEMS region. The CMOS cap includes a base cap with release openings and a seal cap which seals the release openings.
CMOS-MEMS INTEGRATION WITH THROUGH-CHIP VIA PROCESS
The integrated CMOS-MEMS device includes a CMOS structure, a cap structure, and a MEMS structure. The CMOS structure, fabricated on a first substrate, includes at least one conducting layer. The cap structure, including vias passing through the cap structure, has an isolation layer deposited on its first side and has a conductive routing layer deposited on its second side. The MEMS structure is deposited between the first substrate and the cap structure. The integrated CMOS-MEMS device also includes a conductive connector that passes through one of the vias and through an opening in the isolation layer on the cap structure. The conductive connector conductively connects a conductive path in the conductive routing layer on the cap structure with the at least one conducting layer of the CMOS structure.
A SINGLE MEMBRANE FLOW-PRESSURE SENSING DEVICE
We disclose herein a CMOS-based sensing device comprising a substrate comprising an etched portion, a first region located on the substrate, wherein the first region comprises a membrane region formed over an area of the etched portion of the substrate, a flow sensor formed within the membrane region and a pressure sensor formed within the membrane region.
CMOS compatible capacitive absolute pressure sensors
Monolithic integration of microelectromechanical systems (MEMS) sensors with complementary oxide semiconductor (CMOS) electronics for pressure sensors is a very challenging task. This is primarily due to the requirement for a very high quality thin diaphragm to provide the pressure dependent MEMS deformation that can be sensed and, when seeking absolute rather than relative pressure sensors, a sealed reference cavity. Accordingly, a new manufacturing process is established based upon back-etching and bonding of a monolithic absolute silicon carbide (SiC) capacitive pressure sensor. Beneficially, the process embeds the critical features of the MEMS within a shallow trench formed within the silicon substrate and then processing the CMOS circuit. The process further benefits as it maintains that those elements of the MEMS element fabrication process that are CMOS compatible are implemented concurrently with those CMOS steps as well as the metallization steps. However, the CMOS incompatible processing is partitioned discretely.
Integrating MEMS structures with interconnects and vias
A conductive layer is deposited into a trench in a sacrificial layer on a substrate. An etch stop layer is deposited over the conductive layer. The sacrificial layer is removed to form a gap. In one embodiment, a beam is over a substrate. An interconnect is on the beam. An etch stop layer is over the beam. A gap is between the beam and the etch stop layer.
CMOS cap for MEMS devices
A complementary metal oxide semiconductor (CMOS) device embedded with micro-electro-mechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermoconforms. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the MEMS sensors in the MEMS region. The CMOS cap includes a base cap with release openings and a seal cap which seals the release openings.
THERMOELECTRIC-BASED INFRARED DETECTOR WITH HIGH CMOS INTEGRATION
Device and method of forming a device are disclosed. The device includes a substrate with a transistor component disposed in a transistor region and a micro-electrical mechanical system (MEMS) component disposed on a membrane over a lower sensor cavity in a hybrid region. The MEMS component serves as thermoelectric-based infrared sensor, a thermopile line structure which includes an absorber layer disposed over a portion of oppositely doped first and second line segments. A back-end-of-line (BEOL) dielectric is disposed on the substrate having a plurality of inter layer dielectric (ILD) layers with metal and via levels. The ILD layers include metal lines and via contacts for interconnecting the components of the device. The metal lines in the metal levels are configured to define a BEOL or an upper sensor cavity over the lower sensor cavity, and metal lines of a first metal level of the BEOL dielectric are configured to define a geometry of the MEMS component.
Hybrid CMOS-MEMS devices adapted for high-temperature operation and method for their manufacture
A silicon carbide based MOS integrated circuit is monolithically integrated with a suspended piezoelectric aluminum nitride member to form a high-temperature-capable hybrid MEMS-over-MOS structure. In the integrated structure, a post-MOS passivation layer of silicon carbide is deposited over the MOS passivation and overlain by a structural layer of the MEMS device. Electrical contact to refractory metal conductors of the MOS integrated circuit is provided by tungsten vias that are formed so as to pass vertically through the structural layer and the post-MOS passivation layer.