A preclean process may be omitted from a eutectic bonding sequence. To remove oxide from one or more surfaces of a device wafer of a micro-electromechanical-system (MEMS) structure, a duration of an acid-based etch process in the eutectic bonding sequence may be increased relative to the duration of the acid-based etch process when the preclean process is performed. The increased duration of the acid-based etch process enables the acid-based etch process to remove the oxide from the one or more surfaces of the device wafer without the use of a preceding preclean process. This reduces the complexity and cycle time of the eutectic bonding sequence, reduces the risk of stiction between suspended mechanical components of the MEMS structure, and/or reduces the likelihood that the MEMS structure may be rendered defective or inoperable during manufacturing, which increases process yield.

A preclean process may be omitted from a eutectic bonding sequence. To remove oxide from one or more surfaces of a device wafer of a micro-electromechanical-system (MEMS) structure, a duration of an acid-based etch process in the eutectic bonding sequence may be increased relative to the duration of the acid-based etch process when the preclean process is performed. The increased duration of the acid-based etch process enables the acid-based etch process to remove the oxide from the one or more surfaces of the device wafer without the use of a preceding preclean process. This reduces the complexity and cycle time of the eutectic bonding sequence, reduces the risk of stiction between suspended mechanical components of the MEMS structure, and/or reduces the likelihood that the MEMS structure may be rendered defective or inoperable during manufacturing, which increases process yield.

The present application relates to structures for supporting mechanical, electrical and/or electromechanical components, devices and/or systems and to methods of fabricating such structures. The application describes a primary die comprising an aperture extending through the die. The aperture is suitable for receiving a secondary die. A secondary die may be provided within the aperture of the primary die.

Described are transducer assemblies and imaging devices comprising: a microelectromechanical systems (MEMS) die including a plurality of piezoelectric elements; a complementary metal-oxide-semiconductor (CMOS) die electrically coupled to the MEMS die by a first plurality of bumps and including at least one circuit for controlling the plurality of piezoelectric elements; and a package secured to the CMOS die by an adhesive layer and electrically connected to the CMOS die.

A method includes forming an etch stop layer over a first side of a device wafer. The method also includes forming a polysilicon layer over the etch stop layer. A handle wafer is fusion bonded to the first side of the device wafer. A eutectic bond layer is formed on a second side of the device wafer. A micro-electro-mechanical system (MEMS) features are etched into the second side of the device wafer to expose the etch stop layer. The exposed etch stop layer is removed to expose the polysilicon layer. The exposed polysilicon layer is removed to expose a cavity formed between the handle wafer and the device wafer.

A chip package includes a first die, a second die, a molding material, and a redistribution layer. The first die includes a first conductive pad. The second die is disposed on the first die and includes a second conductive pad. The molding material covers the first die and the second die. The molding material includes a top portion, a bottom portion, and an inclined portion adjoins the top portion and the bottom portion. The top portion is located on the second die, and the bottom portion is located on the first die. The redistribution layer is disposed along the top portion, the inclined portion, and the bottom portion. The redistribution layer is electrically connected to the first conductive pad and the second conductive pad.

A packaged environmental sensor includes a supporting structure and a sensor die, which incorporates an environmental sensor and is arranged on a first side of the supporting structure. A control chip is coupled to the sensor die and is arranged on a second side of the supporting structure opposite to the first side. A lid is bonded to the first side of the supporting structure and is open towards the outside in a direction opposite to the supporting structure. The sensor die is housed within the lid.

Described herein are methods and systems useful in the fabrication of ultrasound transducer devices. Fabrication of ultrasound transducer devices can comprise manipulation of components having extremely small cross-sectional thicknesses, which can increase the risk of damage to the components. For example, inadvertent application of forces sufficient to damage such components is a significant risk during fabrication steps. As described herein, the risk of damage to an ultrasound transducer device component having a small cross-sectional thickness, such as an ultrasound microelectromechanical system (MEMS) wafer, can be reduced by partially or completely coating or filling all or a portion of the component with a stabilizing material, for example, prior to subjecting the component to forces associated with manipulation of the component during the fabrication process.

The present invention provides a new architecture of system-on-chip ultrasonic transducer array. It is based on fusion bond of two active wafers which have prefabricated CMOS integrated circuits and CMUT structures; precise thin-down of one wafer to form CMUT monocrystalline silicon membrane; and then to vertically connect CMUT array to CMOS IC layers underneath. This architecture can realize a high-density CMUT array with multiple layers of CMOS devices, such as all supporting CMOS ICs, to achieve a SOC solution. The present invention further provides a manufacturing method for above-mentioned SOC CMUT approach, and this manufacturing process can be realized in both 8 inch and 12-inch wafer manufacturing fabs. The disclosed manufacturing processes are more compatible with existing CMOS process flow, more cost-competitive for mass production.

A micromechanical sensor, including a micromechanical chip having a first micromechanical structure, a first evaluation chip, having a first application-specific integrated circuit, and a second evaluation chip having a second application-specific integrated circuit. The first evaluation chip and the micromechanical chip are situated in a stacked manner, the micromechanical chip being directly electrically conductively connected with the first evaluation chip and the first evaluation chip being directly electrically conductively connected with the second evaluation chip. The first application-specific integrated circuit primarily includes analog circuit elements and the second application-specific circuit primarily includes digital circuit elements.