The integrated CMOS-MEMS device includes a CMOS structure, a cap structure, and a MEMS structure. The CMOS structure, fabricated on a first substrate, includes at least one conducting layer. The cap structure, including vias passing through the cap structure, has an isolation layer deposited on its first side and has a conductive routing layer deposited on its second side. The MEMS structure is deposited between the first substrate and the cap structure. The integrated CMOS-MEMS device also includes a conductive connector that passes through one of the vias and through an opening in the isolation layer on the cap structure. The conductive connector conductively connects a conductive path in the conductive routing layer on the cap structure with the at least one conducting layer of the CMOS structure.

A method includes attaching an upper substrate to an upper surface of a sensor substrate, forming, on an upper surface of the upper substrate, a mask providing a first opening and a second opening communicating with the first opening, the second opening having a width that decreases with increase in a distance from the first opening, carrying out a sandblast process on the upper substrate exposed to an outside via the first opening and the second opening, allowing the sensor substrate to be exposed to the outside immediately below the first opening, and forming a slope on the upper substrate immediately below the second opening, and forming a first wiring member in contact with the exposed sensor substrate and a second wiring member being in contact with the slope and continuing to the first wiring member.

A hermetically sealed component may comprise a glass substrate, a device with at least one electrical port associated with the glass substrate, and a glass cap. The glass cap may have at least one side wall. The glass cap may have a shaped void extending therethrough, from top surface of the glass cap to bottom surface of glass pillar. An electrically conductive plug may be disposed within the void, the plug configured to hermetically seal the void. The electrically conductive plug may be electrically coupled to the electrical port. The glass cap may be disposed on the glass substrate, with the at least one side wall disposed therebetween, to form a cavity encompassing the device. The side wall may contact the glass substrate and the glass cap to provide a hermetic seal, such that a first environment within the cavity is isolated from a second environment external to the cavity.

A sensor includes a sensor substrate, and an upper lid substrate joined to an upper surface of the sensor substrate. The sensor substrate includes a fixed part, a deformable beam connected to the fixed part, and a weight connected to the beam. The weight is movable relative to the fixed part. The upper lid substrate includes a first part containing silicon and a second part joined to the first part and containing glass. The first part includes a projection protruding toward the sensor substrate relative to the second part. The sensor has high accuracy or high reliability.

An electrical contacting between a surrounding wiring and a conductor region. The conductor region is situated in a conductor layer above an SOI wafer or SOI chip. A cover layer is situated above the conductor layer and below the surrounding wiring. The cover layer has a contacting region. The contacting region is insulated from the rest of the cover layer by a first configuration of recesses. An opening is formed at least in the contacting region. A metallic material is situated in the opening. The metallic material connects the surrounding wiring and the conductor region.

A wafer level package comprises a functional wafer with a first surface, device structures connected to device pads arranged on the first surface. A cap wafer, having an inner and an outer surface, is bonded with the inner surface to the first surface of the functional wafer. A frame structure surrounding the device structures is arranged between functional wafer and cap wafer. Connection posts are connecting the device pads on the first surface to inner cap pads on the inner surface. Electrically conducting vias are guided through the cap wafer connecting inner cap pads on the inner surface and package pads on the outer surface of the cap wafer.

A method for manufacturing a microelectromechanical systems (MEMS) device, includes forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; and forming a capacitive structure. Forming the capacitive structure includes arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.

An infrared emitter with a glass lid for emitting infrared radiation comprises a package enclosing a cavity, wherein a first part is transparent for infrared radiation and a second part comprises a glass material and a heating structure configured for emitting the infrared radiation, wherein the heating structure is arranged in the cavity between the first part and the second part of the package.

A sensor package comprises a MEMS sensor chip, a cover arranged over a first main surface of the MEMS sensor chip, said cover being fabricated from a mold compound, and an electrical through contact extending through the cover and to electrically couple the sensor package to a circuit board arranged over the cover.

A MEMS device and a MEMS device manufacturing method are provided for suppressing damage to device parts. An exemplary method of manufacturing a resonance device includes radiating laser light from a bottom surface side of a second substrate to form modified regions inside the second substrate along dividing lines of a first substrate, which has device parts formed on a top surface thereof, and the second substrate, the top surface of which is bonded to the bottom surface of the first substrate via bonding portions. The method further includes dividing the first and second substrates along the dividing lines by applying stress to the modified regions. The bonding portions are formed along the dividing lines and block the laser light.