A sealing structure with a surface of a base material with a through-hole, an underlying metal film, and a sealing member bonded to the underlying metal film to seal the through-hole. The sealing member includes a compressed product of a metal powder including gold having a purity of 99.9% by mass or more and a lid-like metal film including a bulk-like metal including gold and having a thickness of not less than 0.01 m and not more than 5 m. The sealing material includes an outer periphery-side densified region in contact with an underlying metal film and a center-side porous region in contact with the through-hole. The shape of pores in the densified region is specified, and the horizontal length (l) of a pore in the radial direction at any cross-section of the densified region and the width (W) of the densified region satisfy the relationship of l0.1W.

A waterproof MEMS chip package structure includes a substrate having aa through hole cut through opposing top and bottom surface thereof, a waterproof membrane disposed in the through hole, an along chip bonded to the top surface of the substrate, a MEMS chip stacked on the analog chip and electrically connected to the substrate and the analog chip by wire bonding, and a top cover mounted on the substrate to form an accommodation chamber that accommodates the analog chip and the MEMS chip and communicates with the outside through the through hole. Therefore, the MEMS chip package structure of the present invention utilizes the waterproof membrane to block water vapor from entering the accommodation chamber through the through hole, thereby achieving the effect of protecting the chips.

A semiconductor device includes a first silicon layer disposed between second and third silicon layers and separated therefrom by respective first and second oxide layers. A cavity within the first silicon layer is bounded by interior surfaces of the second and third silicon layers, and a passageway extends through the second silicon layer to enable material removal from within the semiconductor device to form the cavity. A metal feature is disposed within the passageway to hermetically seal the cavity.

In described examples, a cavity is formed between a substrate and a cap. One or more access holes are formed through the cap for removing portions of a sacrificial layer from within the cavity. A cover is supported by the cap, where the cover is for occulting the one or more access holes along a perspective. An encapsulant seals the cavity, where the encapsulant encapsulates the cover and the one or more access holes.

A method for setting a pressure in a cavern formed using a substrate and a substrate cap, the cavern being part of a semiconductor system, including an additional cavern formed with using the substrate and of the substrate cap, a microelectromechanical system being situated in the cavern, an additional microelectromechanical system being situated in the additional cavern, a diffusion area being situated in the substrate and/or in the substrate cap, the method includes a gas diffusing with the aid of the diffusion area from the surroundings into the cavern, during the diffusing, a diffusivity and/or a diffusion flow of the gas from the surroundings into the cavern being greater than an additional diffusivity and/or an additional diffusion flow of the gas from the surroundings into the additional cavern, and/or during the diffusing, the additional cavern being at least essentially protected from a penetration of the gas into the additional cavern.

In described examples, a first metal layer is arranged along a periphery of a cavity to be formed between a first substrate and a second substrate. A second metal layer is arranged adjacent to the first metal layer, where the second metal layer includes a cantilever. The cantilever is arranged to deform in response to forces applied from a contacting structure of the second substrate during bonding of the first substrate to the second substrate. The deformed cantilevered is arranged to impede contaminants against contacting an element within the cavity.

A multi-layer sealing film for high seal yield is provided. In some embodiments, a substrate comprises a vent opening extending through the substrate, from an upper side of the substrate to a lower side of the substrate. The upper side of the substrate has a first pressure, and the lower side of the substrate has a second pressure different than the first pressure. The multi-layer sealing film covers and seals the vent opening to prevent the first pressure from equalizing with the second pressure through the vent opening. Further, the multi-layer sealing film comprises a pair of metal layers and a barrier layer sandwiched between metal layers. Also provided is a microelectromechanical systems (MEMS) package comprising the multilayer sealing film, and a method for manufacturing the multi-layer sealing film.

A method for setting a pressure in a cavity formed with the aid of a substrate and a substrate cap, a microelectromechanical system being situated in the cavity, the substrate including a main extension plane. The method includes the following steps: in a first step a clearance is created in the substrate cap, the clearance connecting the cavity to the surroundings, a first clearance end of the clearance being formed on a first surface of the substrate cap that faces away from the cavity, a second clearance end of the clearance being formed on a cavity-side second surface of the substrate cap, the first clearance end and the second clearance end being situated at a distance from one another at least in a first direction which is parallel to the main extension plane; in a second step, after the first step, the clearance is sealed.

In an example implementation, a substance detection device includes a chamber with chamber walls, a chamber top, and a chamber bottom. A substrate comprises imprinted nanostructures positioned within the chamber, and the substrate is coupled to the chamber walls to form the chamber bottom. An inert gas is sealed within the chamber.

Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.