Patent classifications
B81C2201/0104
Curved RF electrode for improved Cmax
The present invention generally relates to a MEMS device and a method of manufacture thereof. The RF electrode, and hence, the dielectric layer thereover, has a curved upper surface that substantially matches the contact area of the bottom surface of the movable plate. As such, the movable plate is able to have good contact with the dielectric layer and thus, good capacitance is achieved.
TRANSDUCER ELEMENT AND METHOD OF MANUFACTURING A TRANSDUCER ELEMENT
The present invention concerns a transducer element (1) which comprises a substrate (5) which comprises a cavity (23) extending through the substrate (5), a backplate (3) which is arranged in the cavity (23) of the substrate (5) and a membrane (2) which is movable relative to the backplate (3). Further, the present invention concerns a method of manufacturing a transducer element (1).
POLISHING SLURRY FOR SILICON, METHOD OF POLISHING POLYSILICON AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR SUBSTRATE
A polishing slurry for silicon, a method of polishing polysilicon, and a method of manufacturing a thin film transistor substrate, the slurry including a polishing particle; a dispersing agent including an anionic polymer, a hydroxyl acid, or an amino acid; a stabilizing agent including an organic acid, the organic acid including a carboxyl group; a hydrophilic agent including a hydrophilic group and a hydrophobic group, and water, wherein the polishing particle is included in the polishing slurry in an amount of about 0.1% by weight to about 10% by weight, based on a total weight of the slurry, a weight ratio of the polishing particle and the dispersing agent is about 1:0.01 to about 1:0.2, a weight ratio of the polishing particle and the stabilizing agent is about 1:0.001 to about 1:0.1, and a weight ratio of the polishing particle and the hydrophilic agent is about 1:0.01 to about 1:3.
SUBSTRATE STRUCTURE, SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME
The present disclosure provides a substrate structure for a micro electro mechanical system (MEMS) device. The substrate structure includes a cap and a micro electro mechanical system (MEMS) substrate. The cap has a cavity, and the MEMS substrate is disposed on the cap. The MEMS substrate has a plurality of through holes exposing the cavity, and an aspect ratio of the through hole is greater than 30.
Method for adaptive feedback controlled polishing
An adaptive feedback control method is provided for a chemical mechanical polish process to minimize a dielectric layer clearing time difference between two annular regions on a substrate. An optical system with an optical window passes below the polishing pad and detects reflected light interference signals from at least two annular regions. A pre-clearing time difference is determined and is used to calculate an adjustment to one or both of a CMP head membrane pressure and a retaining ring pressure. The pressure adjustment is applied before the end of the polish cycle to avoid the need for a second polish cycle and to reduce a dishing difference and a resistance difference in a metal layer in the at least two annular regions. In some embodiments, a second pressure adjustment is performed before the end of the cycle and different CMP head membrane pressure adjustments are made in different pressure zones.
NANOGAP STRUCTURE FOR MICRO/NANOFLUIDIC SYSTEMS FORMED BY SACRIFICIAL SIDEWALLS
A technique relates to a nanogap array. A substrate has been anisotropically etched with trenches that have tapered sidewalls. A sacrificial layer is on bottoms and the tapered sidewalls of the trenches. A filling material is formed on top of the sacrificial layer in the trenches. Nanogaps are formed where at least a portion of the sacrificial layer has been removed from the tapered sidewalls of the trenches while the sacrificial layer remains on the bottoms of the trenches. Each of the nanogaps is formed between one tapered sidewall of the substrate and a corresponding tapered sidewall of the filling material. The one tapered sidewall of the substrate opposes the corresponding tapered sidewall. A capping layer is disposed on top of the substrate and the filling material, such that the nanogaps are covered but not filled in.
NANOGAP STRUCTURE FOR MICRO/NANOFLUIDIC SYSTEMS FORMED BY SACRIFICIAL SIDEWALLS
A technique relates to a nanogap array. A substrate has been anisotropically etched with trenches that have tapered sidewalls. A sacrificial layer is on bottoms and the tapered sidewalls of the trenches. A filling material is formed on top of the sacrificial layer in the trenches. Nanogaps are formed where at least a portion of the sacrificial layer has been removed from the tapered sidewalls of the trenches while the sacrificial layer remains on the bottoms of the trenches. Each of the nanogaps is formed between one tapered sidewall of the substrate and a corresponding tapered sidewall of the filling material. The one tapered sidewall of the substrate opposes the corresponding tapered sidewall. A capping layer is disposed on top of the substrate and the filling material, such that the nanogaps are covered but not filled in.
Substrate structure, semiconductor structure and method for fabricating the same
The present disclosure provides a substrate structure for a micro electro mechanical system (MEMS) device. The substrate structure includes a cap and a micro electro mechanical system (MEMS) substrate. The cap has a cavity, and the MEMS substrate is disposed on the cap. The MEMS substrate has a plurality of through holes exposing the cavity, and an aspect ratio of the through hole is greater than 30.
METHOD OF INCREASING MEMS ENCLOSURE PRESSURE USING OUTGASSING MATERIAL
Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
MEMS transducer having a carrier layer and at least two piezoelectric layers
In one aspect, a MEMS transducer, in particular a MEMS sound transducer unit, preferably for generating and/or detecting sound waves in the audible wavelength spectrum and/or in the ultrasonic range, includes a carrier and at least one piezoelectric element. The at piezoelectric element(s) is arranged on the carrier and is deflectable in the direction of a stroke axis, with the piezoelectric element(s) having at least two piezoelectric layers and at least one carrier layer. By means of the at least two piezoelectric layers, electrical signals and deflections of the piezoelectric element(s) can be converted from one into the other. Additionally, the carrier layer is arranged between two piezoelectric layers in the direction of the stroke axis.