The present invention relates to a method for manufacturing a membrane component with a membrane made of a thin film (<1 m, thin-film membrane). The membrane component can be used in microelectromechanical systems (MEMS). The invention is intended to provide a method for manufacturing a membrane component, the membrane being manufacturable with high-precision membrane dimensions and a freely selectable membrane geometry. This is achieved by a method comprising . . . providing a semiconductor wafer (100) with a first layer (116), a second layer (118) and a third layer (126). Depositing (12) a first masking layer (112) on the first layer (116), the first masking layer (112) defining a first selectively processable area (114) for determining a geometry of the membrane (M.sub.1). Forming (13) a first recess (120) by anisotropic etching (13) of the first layer (116) and removing the first masking layer (112). Introducing (14) a material (122) in the first recess (120) and depositing (15) a membrane layer (124) on the first layer (116) with the introduced material (122). Depositing on the third layer (126) a second masking layer that defines a second selectively processable area. Forming a second recess by anisotropic etching of the third layer (126) and of the second layer (118) up to the first layer (116). Removing the second masking layer; and isotropically etching (18) the first layer (116), the isotropic etching being limited by the membrane layer (124) and by the introduced material (122), so that the membrane (M.sub.1) will be exposed.

The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.

The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.

The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a cap substrate is bonded to a device substrate. The cap substrate comprises a first trench, a second trench, and an edge trench recessed from at a front-side surface of the cap substrate. A stopper is disposed within the first trench and raised from a bottom surface of the first trench. The stopper has a top surface lower than the front-side surface of the cap substrate.

The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a cap substrate is bonded to a device substrate. The cap substrate comprises a first trench, a second trench, and an edge trench recessed from at a front-side surface of the cap substrate. A stopper is disposed within the first trench and raised from a bottom surface of the first trench. The stopper has a top surface lower than the front-side surface of the cap substrate.

A ultrasonic transducer device includes a transducer bottom electrode layer disposed over a substrate, and a plurality of vias that electrically connect the bottom electrode layer with the substrate, wherein substantially an entirety of the plurality of vias are disposed directly below a footprint of a transducer cavity. Alternatively, the transducer bottom electrode layer includes a first metal layer in contact with the plurality of vias and a second metal layer formed on the first metal layer, the first metal layer including a same material as the plurality of vias.

An embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.

A method of forming an ultrasonic transducer device includes forming and patterning a film stack over a substrate, the film stack comprising a metal electrode layer and a chemical mechanical polishing (CMP) stop layer formed over the metal electrode layer; forming an insulation layer over the patterned film stack; planarizing the insulation layer to the CMP stop layer; measuring a remaining thickness of the CMP stop layer; and forming a membrane support layer over the patterned film stack, wherein the membrane support layer is formed at thickness dependent upon the measured remaining thickness of the CMP stop layer, such that a combined thickness of the CMP stop layer and the membrane support layer corresponds to a desired transducer cavity depth.

The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region, a second trench in a second region, and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, a stopper is formed by performing an etch to the cap substrate such that a first portion of a bottom surface of the first trench uncovered by the hard mask is recessed while a second portion of the bottom surface of the first trench covered by the hard mask is non-altered to form a stopper within the first trench. Then, a second etch is performed to the second trench to lower the bottom surface of the second trench.

An integrated package method for MEMS element and ASIC chip includes forming a re-layout layer on a front surface of an ASIC wafer; coating an organic compound layer on the re-layout layer and applying a lithography process to the organic compound layer to from a microcavity array; aligning and bonding an electrode connection pad layer on a front surface of an MEMS element with the microcavity array to form a closed cavity structure; thinning and exposing a silicon substrate on a back surface of the MEMS element to a desired thickness; applying the lithographic process on the MEMS element to expose the electrode connection pad layer and an electrical contact area of the re-layout layer; and manufacturing a metal connection member connected to the electrode connection pad layer and the electrical contact area. An integrated package structure for MEMS element and ASIC chip is also provided.