Methods of dicing semiconductor wafers are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a material layer over and between the plurality of singulated dies above the dicing tape. The method also includes expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding.

Methods of dicing semiconductor wafers are described. In an example, a method of dicing a semiconductor wafer having integrated circuits thereon involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a multiple pass laser scribing process to provide a patterned mask with gaps exposing regions of the semiconductor wafer between the integrated circuits, the multiple pass laser scribing process including a first pass along a first edge scribing path, a second pass along a center scribing path, a third pass along a second edge scribing path, a fourth pass along the second edge scribing path, a fifth pass along the center scribing path, and a sixth pass along the first edge scribing path. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

Systems and methods for dicing a sample by a Bessel beam matrix are disclosed. The method for dicing a sample by a Bessel beam matrix may comprise generating a Bessel beam matrix including multiple Bessel beams arranged in a matrix form, according to a predetermined dicing layout of the sample; controlling a focus position of each Bessel beam in the generated Bessel beam matrix; and focusing simultaneously the Bessel beams of the Bessel beam matrix at the respective controlled focus positions within the sample for dicing.

Methods of dicing semiconductor wafers are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a material layer over and between the plurality of singulated dies above the dicing tape. The method also includes expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding.

A mask sheet and a method for manufacturing the same are provided. A mask sheet includes one or more openings defined therein, and an alloy of nickel and iron, and a particle of the alloy has a single crystalline structure. A method for manufacturing a mask sheet includes preparing a base sheet including an alloy of nickel and iron, performing a heat treatment on the entire base sheet; and forming one or more openings in the heat-treated base sheet.

A mask manufacturing apparatus, a method of manufacturing the mask, and a mask for lithography, capable of providing a pattern having a size in nanometer unit using the photo-lithography process are provided. A mask manufacturing apparatus, a method of manufacturing the mask, and an elastic film for a photo-mask lower a critical dimension of the pattern(s) without increasing a manufacturing cost. The mask manufacturing apparatus and the method of manufacturing the mask, and the mask for lithography provide a pattern having a size in nanometer unit using the photo-lithography process.

A method of manufacturing a mask includes forming a first protection layer on a first surface of a mask member, the first protection layer comprising first through-holes exposing portions of the first surface; radiating, through the first through-holes, a laser beam onto the exposed portions of the first surface to form blind holes in the mask member; and providing an etchant to form second through-holes in the mask member, the second through-holes comprising the blind bores and extending from the first surface to a second surface of the mask member opposing the first surface.

An electrode manufacturing device includes a transfer part, a laser irradiation part, and a pattern jig. The transfer part continuously transfers an electrode sheet in order to perform an electrode notching process. The laser irradiation part irradiates the electrode sheet with a laser beam to perform the electrode notching process. The pattern jig is positioned at a portion facing the laser irradiation part with the electrode sheet interposed therebetween to support the electrode sheet. The pattern jig includes a panel having a pattern hole through which the laser beam that has notched the electrode sheet passes, and the pattern hole has a structure which becomes wider from the front toward the rear along a laser beam traveling direction.

A mask manufacturing apparatus, a method of manufacturing the mask, and a mask for lithography, capable of providing a pattern having a size in nanometer unit using the photo-lithography process are provided. A mask manufacturing apparatus, a method of manufacturing the mask, and an elastic film for a photo-mask lower a critical dimension of the pattern(s) without increasing a manufacturing cost. The mask manufacturing apparatus and the method of manufacturing the mask, and the mask for lithography provide a pattern having a size in nanometer unit using the photo-lithography process.

Methods of dicing semiconductor wafers are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a material layer over and between the plurality of singulated dies above the dicing tape. The method also includes expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding.