A method for forming a charge balance region in a semiconductor device includes: providing an epitaxial layer on a substrate, whereby a diffusion layer is formed between the substrate and the epitaxial layer; forming a plurality of recessed features extending in a vertical direction in the epitaxial layer and laterally spaced apart from one another; forming an insulating layer on at least sidewalls of each of the recessed features; and forming a resistive film on the insulating layer and a bottom of each of the recessed features using atomic layer deposition. The resistive film is configured to provide a conductive path between an upper surface of the epitaxial layer and one of the diffusion layer, a lower portion of the epitaxial layer, or the substrate, whereby a current flowing through the resistive film fully depletes at least a portion of the epitaxial layer between adjacent recessed features.

A capacitor is provided for high temperature systems. The capacitor includes: a substrate formed from silicon carbide material; a dielectric stack layer, including a first layer deposited on the substrate and a second layer deposited on the first layer; a Schottky contact layer deposited on the second layer; and an Ohmic contact layer deposited on the substrate. The first layer is formed with aluminum nitride (AlN) epitaxially, and the second layer is formed with aluminum oxide (Al.sub.2O.sub.3). AlN and Al.sub.2O.sub.3 are ultrawide band gap materials, and as a result, they can be use as the dielectric in the capacitor, allowing the capacitance changes to be less than 10% between 250 C. and 600 C., which is very effective for the high temperature systems.

According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first nitride region, a second nitride region, and a third nitride region. The first nitride region includes Al.sub.x1Ga.sub.1-x1N (0x1<1). The first nitride region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The second nitride region includes Al.sub.x2Ga.sub.1-x2N (x1<x21) or In.sub.yAl.sub.zGa.sub.(1-y-z)N (0<y1, 0z<1, y+z1). The second nitride region includes a sixth partial region. The third nitride region includes Al.sub.x3Ga.sub.1-x3N (x1<x3<x2). The third nitride region includes a seventh partial region.

Provided is an apparatus for processing a substrate, which includes a chamber having a processing space in which a process of depositing a thin-film on a substrate is performed and a structure which is installed to expose at least one surface to the processing space and in which a coating layer made of a polymer forming at least one of covalent bond and double bond at an end tail is formed on the surface exposed to the processing space. Thus, the substrate processing apparatus in accordance with an exemplary embodiment may restrict or prevent particle generation and substrate pollution generation caused by a thin-film deposited in the chamber. Also, a period of cleaning the chamber and a structure or a component in the chamber may be extended. Thus, a product yield rate and an apparatus operation efficiency may improve.

A method for producing a semiconductor power device includes forming a gate trench from a surface of the semiconductor layer toward an inside thereof. A first insulation film is formed on the inner surface of the gate trench. The method also includes removing a part on a bottom surface of the gate trench in the first insulation film. A second insulation film having a dielectric constant higher than SiO2 is formed in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film.

In some embodiments, methods are provided for simultaneously and selectively depositing a first material on a first surface of a substrate and a second, different material on a second, different surface of the same substrate using the same reaction chemistries. For example, a first material may be selectively deposited on a metal surface while a second material is simultaneously and selectively deposited on an adjacent dielectric surface. The first material and the second material have different material properties, such as different etch rates.

A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

A method for manufacturing a semiconductor device with high productivity is provided. The method includes a step of forming a first insulator, a second insulator, and a third insulator in this order using a multi-chamber apparatus; a step of forming a fourth insulator, a fifth insulator, a first oxide film, a second oxide film, and a third oxide film in this order using a multi-chamber apparatus; a step of forming a conductive film; a step of processing the first oxide film, the second oxide film, the third oxide film, and the conductive film, thereby forming a first oxide, a second oxide, an oxide layer, and a conductive layer each having an island shape; a step of forming a sixth insulator and an insulating film in this order using a multi-chamber apparatus; a step of planarizing the insulating film; a step of forming, in the insulating film and the sixth insulator, an opening where the second oxide is exposed; a step of forming a seventh insulator and a first conductor; and a step of forming an eighth insulator and a ninth insulator in this order using a multi-chamber apparatus.

Disclosed is a method for manufacturing an aluminum precursor formed by mixing 1 to 3 moles of a compound represented by the following Chemical Formula 1 or following Chemical Formula 2 and 1 to 3 moles of a compound represented by the following Chemical Formula 3,

##STR00001## wherein X is O or S, and R1 or R2 is each independently selected from an alkyl group having 1 to 8 carbon atoms, a cycloalkyl group having 3 to 6 carbon atoms, and an aryl group having 6 to 12 carbon atoms,

##STR00002## wherein X is O or S, n is 1 to 5, and R1 to R4 are each independently selected from a hydrogen atom, an alkyl group having 1 to 5 carbon atoms, a cycloalkyl group having 3 to 6 carbon atoms, and an aryl group having 6 to 12 carbon atoms,

##STR00003## wherein R1, R2 and R3 are different from each other, and each independently selected from a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, a dialkylamine having 1 to 6 carbon atoms, a cycloamine group having 1 to 6 carbon atoms, or a halogen atom.

Disclosed is a semiconductor doping method, and the semiconductor doping method includes: forming a molybdenum disulfide (MoS.sub.2) layer on a substrate; sputtering and depositing an aluminum nitride (AlOxNy) thin film on a surface of the molybdenum disulfide (MoS.sub.2) layer; and injecting electrons into the molybdenum disulfide (MoS.sub.2) through the deposition of the aluminum nitride (AlOxNy) thin film.