The present disclosure relates to methods and apparatuses for selective deposition on a surface. In particular, a silicon-containing inhibitor can be used to selectively bind to a first region, thus inhibiting deposition of a material on that first region.

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and applying a base composition to the photoresist layer, the base composition includes non-organic base, organic base, thermal base generator, or photobase generator. The photoresist layer is selectively exposed to actinic radiation to form latent pattern. The latent pattern is developed by applying developer composition to selectively exposed photoresist layer to form pattern in photoresist layer. The base composition is applied to photoresist layer during one or more operations selected from group consisting of applying base composition to substrate as underlayer before photoresist layer is formed and the composition is subsequently absorbed by photoresist layer, a pre-exposure baking operation, after photoresist layer is selectively exposed and before developing latent pattern, and after developing latent pattern.

The present disclosure provides a method of manufacturing a semiconductor device. The method includes: forming a transistor region in a substrate; forming a gate dielectric layer over the transistor region; forming a diffusion-blocking layer over the gate dielectric layer; forming a first portion of a work function layer over the diffusion-blocking layer; forming a second portion of the work function layer over the first portion of the work function layer; forming a plurality of barrier elements on or under a top surface of the second portion of the work function layer; and forming a gate electrode over the work function layer, wherein the plurality of barrier elements block oxygen from diffusing into the work function layer during the formation of the gate electrode.

A semiconductor device structure and methods of forming the same are described. The method includes forming a fin structure over a substrate and depositing one or more spacers on a portion of the fin structure. The one or more spacers are deposited on sidewalls of the fin structure. The method further includes removing a first portion of the one or more spacers to expose the fin structure and recessing the fin structure. A first byproduct layer is formed on a second portion of the one or more spacers. The method further includes passivating the first byproduct layer, softening the first byproduct layer, removing a portion of the first byproduct layer to expose the recessed fin structure, and further recessing the fin structure.

A method of manufacturing a semiconductor device includes loading a plurality of substrates into a batch-type substrate processing apparatus, performing a semiconductor process on the plurality of substrates in the batch-type substrate processing apparatus, and unloading the plurality of substrates on which the semiconductor process has been performed from the batch-type substrate processing apparatus. The substrate processing apparatus includes: a processing chamber; a first gas supply unit and a second gas supply unit; and a boat. The first gas supply unit comprises a first gas inlet extending into the processing chamber from the outside of the processing chamber and having a shape including a horizontal portion and a vertical portion, a first gas nozzle on the first gas inlet, and a first adapter connecting the first gas inlet and the first gas nozzle. A diameter of the first gas inlet is greater than a diameter of a second gas inlet.

Methods and systems for forming a structure including multiple carbon layers and structures formed using the methods or systems are disclosed. Exemplary methods include forming a first carbon layer with an initial first flowability and a second carbon layer with an initial second flowability, wherein first flowability is less than second flowability.

A method is presented for selective deposition on metals using porous low-k materials. The method includes forming alternating layers of a porous dielectric material and a first conductive material, forming a surface aligned monolayer (SAM) over the first conductive material, depositing hydroxamic acid (HA) material over the porous dielectric material, growing an oxide material over the first conductive material, removing the SAM, depositing a dielectric layer adjacent the oxide material, and replacing the oxide material with a second conductive material defining a bottom electrode.

The present application provides a method for fabricating multiple work function layers, including: forming the first to the nth transistor gates with notches; forming a blocking layer in the notches; depositing the first work function layer and removing the first work function layer on the first to the (n1)th transistor gates; depositing a second work function layer; removing the second work function layer on the first to the (n2)th transistor gates; depositing a third work function layer on the blocking layer on the first to the (n2)th transistor gates and the second work function layer on the (n1)th and nth transistor gates; removing the third work function layer on the first to (n3)th transistor gates; depositing the third to the (n1)th work function layers by analogy until only the blocking layer exists on the last transistor gate, herein the thickness of the third to the (n1)th work function layers decreases sequentially and gradually.

A method for processing a substrate includes treating the substrate with a small molecular inhibitor (SMI), the substrate including a recess formed in a dielectric layer and a first metal layer in the recess, the SMI covering a surface of the first metal layer. The method further includes, after treating the substrate with the SMI, treating the substrate with a large molecular inhibitor (LMI), the LMI covering sidewalls of the dielectric layer in the recess. The method further includes heating the substrate to remove the SMI from the first metal layer and to expose the first metal layer in the recess, where the LMI remains on the sidewalls after removing the SMI from the first metal layer. The method further includes depositing a second metal over the first metal layer in the recess, where the LMI covering the sidewalls prevents deposition of the second metal on the dielectric layer.

Dielectric films for semiconductor devices and methods of forming. A processing method includes forming a first film of a first dielectric material on a substrate by performing a first plurality of cycles of atomic layer deposition and, thereafter, heat-treating the first film, where a thickness of the first film is below a threshold thickness needed for spontaneous polarization in the first dielectric material. The processing method further includes forming a second film of a second dielectric material on the substrate by performing a second plurality of cycles of atomic layer deposition and, thereafter, heat-treating the second film, where a thickness of the second film is greater than the thickness of the first film, and the second film is ferroelectric or antiferroelectric. The first and second dielectric materials can include at least one metal oxide, for example zirconium oxide, hafnium oxide, or a laminate or mixture thereof.