Patent classifications
H10W70/688
Double-sided cooling power module including reverse-mounted chips
A power module includes an upper substrate and a lower substrate, an upper chip, a lower chip, and a circuit board disposed across a space between the upper substrate and the lower chip and a space between the lower substrate and the upper chip so that the upper substrate and the lower substrate are vertically spaced from each other. The circuit board electrically connects the upper chip to the lower substrate while electrically connecting the lower chip to the upper substrate.
Display device
A display device includes: a display panel; a driving integrated circuit chip configured to drive the display panel; a first printed circuit board connected to the display panel; a second printed circuit board connected to the first printed circuit board; and a cover including a body portion covering the driving integrated circuit chip, the first printed circuit board, and the second printed circuit board, and a wing portion protruding from the body portion, wherein the wing portion extends from a front surface of the display panel to a rear surface of the display panel while surrounding a side surface of the display panel.
Semiconductor package and fabrication method thereof
A semiconductor package includes a die stack including a first semiconductor die having a first interconnect structure, and a second semiconductor die having a second interconnect structure direct bonding to the first interconnect structure of the first semiconductor die. The second interconnect structure includes connecting pads disposed in a peripheral region around the first semiconductor die. First connecting elements are disposed on the connecting pads, respectively. A substrate includes second connecting elements on a mounting surface of the substrate. The first connecting elements are electrically connected to the second connecting elements through an anisotropic conductive structure.
Chip package unit, method of manufacturing the same, and package structure formed by stacking the same
A chip package unit, a method of manufacturing the same, and package structure formed by stacking the same are provided. At least one first connecting pad, at least one second connecting pad, and at least one third connecting pad of a flexible printed circuit (FPC) board in the chip package unit are electrically connected with one another by circuit of the FPC board. At least one die pad disposed on a front surface of a chip is electrically connected with the first connecting pad first and then electrically connected with the outside by the second connecting pad or the third connecting pad. Thereby the chip of the chip package unit can be electrically connected with the outside by the front surface or a back surface thereof. Therefore, not only production is reduced due to simplified production process and energy saved, volume of the package structure is also reduced.
Composite wiring board
A wiring board that facilitates narrowing a pitch of bonding terminals used for bonding to a semiconductor chip, providing finer wiring in a substrate and reducing cost, and is capable of achieving high connection reliability. A composite wiring board includes: a first wiring board; a second wiring board facing the first wiring board and bonded to the first wiring board, a distance from the second wiring board to the first wiring board being greater at a peripheral part than at a center part of the second wiring board; and a sealing resin layer interposed between the first wiring board and the second wiring board, the sealing resin layer covering an end face of the second wiring board.
Inner lead structure of flexible circuit board
An inner lead structure of a flexible circuit board includes a flexible substrate, a circuit layer and a dummy circuit layer. A chip mounting area defined on the flexible substrate is provided for a chip, contacting locations defined within the chip mounting area are provided for conductive elements of the chip. The circuit layer includes inner leads, ends of the inner leads are arranged on the contacting locations and provided to be electrically connected to the conductive elements. At least one of first dummy lines of the dummy circuit layer is arranged in a space between the adjacent inner leads. The space having a distance greater than 50 um is divided into multiple spaces having distances not greater than 50 um. Proportion of the spaces without the first dummy lines and having a distance greater than 50 um is less than 0.5% in all spaces.
SELF-CONFIGURING CONTACT ARRAYS FOR INTERFACING WITH ELECTRIC CIRCUITS AND FABRIC CARRIERS
Embodiments include circuitry and circuit elements such as contact arrays for harvesting power and soft connectors and patches for connecting flexible and stretchable soft circuits.
CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE COMPRISING SAME
A circuit board according to an embodiment includes an insulating layer; and, an electrode part disposed in the insulating layer, wherein the electrode part includes: a first electrode; a second electrode disposed on the first electrode; and first and second via electrodes disposed between the first electrode and the second electrode, the first via electrode is connected to the first electrode and the second electrode, and a length of the second via electrode in a vertical direction is smaller than a length of the first via electrode in the vertical direction.
ADAPTIVE THREE-DIMENSIONAL CIRCUIT ATTACHMENT
Various aspects relate to three-dimensional integrated circuits including a plurality of conformal integrated circuit slices stacked one upon the other. The plurality of conformal integrated circuit slices includes various components. A communication face defines a communication surface configured to conform to a portion of a topography of a non-planar host substrate. A plurality of input-output devices is configured to communicate to a corresponding plurality of host-side input-output devices associated with the non-planar host substrate.
Array substrate, display module and display apparatus each having functional area with bending area
An array substrate, a display module and a display apparatus and belongs to the field of display technology. The array substrate includes: first data lines located in the central area and extending along the first direction; second data lines located in the edge area and extending along the first direction; first connecting lines located between the central area and the functional area and extending along the first direction, the first connecting lines being electrically connected with the first data lines in a one-to-one correspondence; second connecting lines electrically connected with the second data lines in a one-to-one correspondence; and line-switching connecting units electrically connected with the second connecting lines and connecting ports, so that the second data lines are electrically connected, via the second connecting lines and the line-switching connecting units, with the connecting ports in an arrangement order of the second data lines.