H10W70/481

LEADFRAME BASED SEMICONDUCTOR PACKAGE WITH MULTIPLE DEVICES

A semiconductor package includes a plurality of leads, each lead having a planar portion and a non-planar portion, in which: the planar portion has a first side and a second side opposing the first side, and the non-planar portion is at an angle with the planar portion. The semiconductor package includes a first device mechanically coupled to the first side of the planar portion with first interconnects and a second device mechanically coupled to the second side of the planar portion with second interconnects. The semiconductor package includes mold compound covering the first device and the second device, in which: a first mold overlay is on a side of the first device distant from the leads, and a second mold overlay is on a side of the second device distant from to the leads.

Packaged high voltage MOSFET device with connection clip and manufacturing process thereof

An HV MOSFET device has a body integrating source conductive regions. Projecting gate structures are disposed above the body, laterally offset with respect to the source conductive regions. Source contact regions, of a first metal, are arranged on the body in electric contact with the source conductive regions, and source connection regions, of a second metal, are arranged above the source contact regions and have a height protruding with respect to the projecting gate structures. A package includes a metal support bonded to a second surface of the body, and a dissipating region, above the first surface of the semiconductor die. The dissipating region includes a conductive plate having a planar face bonded to the source connection regions and spaced from the projecting gate structures. A package mass of dielectric material is disposed between the support and the dissipating region and incorporates the semiconductor die. The dissipating region is a DBC-type insulation multilayer.

Power semiconductor package
12610833 · 2026-04-21 · ·

A power semiconductor package includes a first substrate assembly with a power semiconductor die defining a high-side power switch, a second substrate assembly arranged parallel to the first substrate assembly which has a power semiconductor die defining a low-side power switch, and a power terminal assembly. The power terminal assembly includes a power terminal substrate arranged between the first and the second substrate assembly, a high-side drain power terminal electrically connected to an electrical drain circuit of the high-side power switch, a low-side source power terminal electrically connected to an electrical source circuit of the low-side power switch, and a mid-point power terminal electrically connected to an electrical source circuit of the high-side power switch and to an electrical drain circuit of the low-side power switch. The high-side drain power terminal, the low-side source power terminal, and the mid-point power terminal are each arranged on the power terminal substrate.

Power module package with molded via and dual side press-fit pin

A module includes an assembly of a semiconductor device die coupled to a lead frame. A board is disposed below the lead frame. The board includes a plated-through hole (PTH) aligned with an opening in the lead frame above the board. The module further includes a mold body encapsulating at least a portion of the assembly. The mold body includes a through-mold via (TMV) aligned with the opening in the lead frame and with the PTH. The PTH is physically accessible from outside the mold body through the TMV and the opening in the lead frame.

SEMICONDUCTOR PACKAGE HAVING COPPER PLATED SOURCE PADS AND METHOD OF MAKING THE SAME

A semiconductor package comprises a lead frame, an FET, a copper layer, a source metal clip, and a molding encapsulation. The FET comprises a gate bus line, a gate electrode, and a source electrode on a top surface of the FET and a drain electrode on a bottom surface of the FET. A method comprises the steps of providing a wafer; attaching a seed layer; applying a photoresist layer; forming openings; electro plating of copper; removing the photoresist layer; removing the seed layer; applying a grinding process; applying a dicing process; attaching a lead frame; mounting source metal clips; forming a molding encapsulation; and applying a singulation process.

SEMICONDUCTOR DEVICE AND INSULATING SWITCH
20260114337 · 2026-04-23 ·

A semiconductor device includes: a switch circuit chip and a control circuit chip, which are mounted on a first die pad; a first conductive bonding material configured to bond the first die pad and the switch circuit chip; and a second conductive bonding material configured to bond the first die pad and the control circuit chip. The switch circuit chip includes: a first semiconductor substrate bonded to the first die pad by the first conductive bonding material; and a first transistor and a second transistor, which have sources connected to each other. Both the first transistor and the second transistor are high electron mobility transistors including nitride semiconductors. The source of the first transistor and the source of the second transistor are electrically connected to the first die pad via the control circuit chip.

Metal layer plated to inner leads of a leadframe

A semiconductor device includes: a semiconductor element; an island lead on which the semiconductor element is mounted; a terminal lead electrically connected to the semiconductor element; a wire connected to the semiconductor element and the terminal lead; and a sealing resin covering the semiconductor element, the island lead, the terminal lead, and the wire. The terminal lead includes a base member having an obverse surface facing in a thickness direction of the terminal lead, and a metal layer located between the obverse surface and the wire. The base member has a greater bonding strength with respect to the sealing resin than the metal layer. The obverse surface includes an opposing side facing the island lead. The obverse surface includes a first portion that includes at least a portion of the opposing side and that is exposed from the metal layer.

Semiconductor device
12616076 · 2026-04-28 · ·

A semiconductor device includes: a first semiconductor chip and a second semiconductor chip each including a first main electrode on a bottom surface side and a second main electrode on a top surface side; a conductive member provided to electrically connect the first main electrode of the first semiconductor chip to the second main electrode of the second semiconductor chip; a first external terminal electrically connected to the second main electrode of the first semiconductor chip and partly opposed to the conductive member, and a resin member provided to be at least partly arranged between the conductive member and the first external terminal.

TRANSISTOR THROUGH-HOLE PACKAGE MODULE
20260123457 · 2026-04-30 · ·

A transistor through-hole package module includes: an insulating package body and at least one transistor encapsulated therein; a lead frame including through-hole pins extending from the insulating package body and a die pad disposed within the insulating package body. The transistor is mounted on the die pad and electrically connected to the through-hole pins; a metal heat sink plate that is partially exposed from the insulating package body. Both the metal heat sink plate and the lead frame are formed of copper or copper alloy, and the side of the lead frame facing away from the transistor is bonded to the metal heat sink plate via a thermally conductive insulating adhesive. The package module of the present disclosure offers the advantage of superior heat dissipation performance.

SYSTEMS AND METHODS FOR LOW INDUCTANCE PHASE SWITCH FOR INVERTER FOR ELECTRIC VEHICLE

A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a power module including: a first phase switch including one or more first phase power switches on a first side of a substrate; and a second phase switch including one or more second phase power switches on a second side of the substrate opposite to the first side.