Patent classifications
H10W74/47
ELECTRONIC CHIPS
An electronic chip including a semiconductor substrate in and on which an integrated circuit is formed at least one connection metallization of the integrated circuit formed on the side of a front face of the semiconductor substrate and a first passivation layer covering the front face of the semiconductor substrate, the first passivation layer including openings in line with the connection metallization of the integrated circuit The chip having a second passivation layer covering the side flanks of the semiconductor substrate, the second passivation layer being made of a parylene, and the first passivation layer and the second passivation layer being in contact with each other on the side of the front face of the semiconductor substrate. Methods of making a device are also provided.
Cross linked surface coating and interfacial layer for a perovskite material photovoltaic device
A method for producing a perovskite material photovoltaic device, the method comprising: depositing a layer comprising a fullerene or fullerene derivative on a perovskite material; depositing a cross-linking agent on the perovskite material or the layer comprising the fullerene or fullerene derivative, wherein the cross-linking agent comprises a silane, wherein the silane is a halosilyalkane; and depositing one or more polymers on the perovskite material or the layer comprising the fullerene or fullerene derivative.
Method to connect power terminal to substrate within semiconductor package
A method of manufacturing a power semiconductor device in accordance with an embodiment of the present disclosure may include providing a substrate disposed atop a heatsink, electrically connecting a semiconductor die to a top surface of the substrate, disposing a thin metallic layer atop the substrate, disposing a terminal atop the thin metallic layer, and performing a welding operation wherein a laser beam is directed at a top surface of the terminal to produce a plurality of weld connections connecting the terminal to the substrate, wherein the weld connections are separated by gaps, and wherein heat generated during the welding operation melts the thin metallic layer and molten material of the thin metallic flows into the gaps.
SEMICONDUCTOR PACKAGE MOLD COMPOUND DAMS
In examples, a semiconductor package includes a semiconductor die including a device side having circuitry formed therein and a non-device side opposite the device side. The semiconductor package includes a mold compound dam on the device side, the mold compound dam comprising a non-metallic material. The semiconductor package includes a mold compound on the device side of the semiconductor die and contacting an outer wall of the mold compound dam, the mold compound absent from a cavity defined by the mold compound dam.
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Provided is a semiconductor package with improvement in warpage thereof and a method of fabricating the semiconductor package. The semiconductor package includes a first semiconductor chip, a redistribution substrate on the first semiconductor chip, a second semiconductor chip on the redistribution substrate, a first encapsulant encapsulating the second semiconductor chip, on the redistribution substrate, a metal post arranged on a top surface of the first semiconductor chip, and a second encapsulant covering side surfaces of the metal post, on the bottom surface of the first semiconductor chip.
Semiconductor packages having organic material layer between through-via structure and encapsulant that surrounds a portion of semiconductor chip
A semiconductor package includes a first redistribution structure including a first redistribution layer; a semiconductor chip on a first surface of the first redistribution structure and including a connection pad electrically connected to the first redistribution layer; an encapsulant that surrounds at least a portion of the semiconductor chip; a second redistribution structure on the encapsulant and including a second redistribution layer; a through-via structure that extends through the encapsulant and electrically connects the first redistribution layer to the second redistribution layer; an organic material layer between the through-via structure and the encapsulant and having an elongation rate greater than an elongation rate of the encapsulant; and a bump structure on a second surface of the first redistribution structure.
METHOD OF MANUFACTURE OF FAN-OUT TYPE SEMICONDUCTOR PACKAGE
A method of manufacture for a semiconductor package includes; forming a first wiring structure, connecting a semiconductor chip to the first wiring structure, forming a lower encapsulant on the first wiring structure to cover at least a portion of a lateral surface of the semiconductor chip, wherein the lower encapsulant does not cover an upper surface of the semiconductor chip, forming an upper encapsulant on the lower encapsulant, wherein the upper encapsulant covers the upper surface of the semiconductor chip and the upper encapsulant has a materially different composition than the lower encapsulant, and forming a second wiring structure on the upper encapsulant.
SEMICONDUCTOR PACKAGE AND COOLING SYSTEM
A semiconductor package includes; a package substrate, an interposer disposed on the package substrate, semiconductor chips mounted on the interposer, a molding member on the interposer and surrounding the semiconductor chips, a first sealing member on the molding member, and a heat dissipation member on the package substrate and covering the interposer, the semiconductor chips, and the first sealing member, wherein the heat dissipation member includes a lower structure contacting an upper surface of the package substrate, and an upper structure on the lower structure, extending over the first sealing member, and including a microchannel and a micropillar on the microchannel.
COMPOUND, RESIN COMPOSITION, PREPREG, RESIN FILM, METAL-CLAD LAMINATE, PRINTED WIRING BOARD, AND SEMICONDUCTOR PACKAGE
An embodiment relates to a compound including: an indene ring; a vinylbenzyl group; and an aromatic ring-containing group of 6 or more carbon atoms without a polymerizable carbon-carbon double bond, in which both of the vinylbenzyl group and the aromatic ring-containing group are directly bonded to the indene ring.
Protective film forming agent, and method for producing semiconductor chip
A protective film forming agent that, in dicing of a semiconductor wafer, is used to form a protective film on the surface of the semiconductor wafer, can form a protective film that has excellent laser processability, and has excellent solubility of a light-absorbing agent; and a method for producing a semiconductor chip using the protective film forming agent. The protective film forming agent includes a water-soluble resin, a light-absorbing agent, a basic compound, and a solvent. The basic compound is an alkylamine, an alkanolamine, an imidazole compound, ammonia, or an alkali metal hydroxide. The light-absorbing agent content of the protective film forming agent is 0.1-10 mass % (inclusive).