A reliability of a semiconductor device can be improved by measuring a value of a current flowing through a power transistor accurately. A semiconductor chip includes a power transistor and a source electrode electrically connected to a source region of the power transistor. The source electrode and a lead terminal are electrically connected to each other via a wire. The source electrode includes detection points for detecting the value of the current flowing through the power transistor. The detection points are arranged so as to sandwich a bonding point of the wire bonded to the source electrode.

A semiconductor device includes a first lead including a base portion, a semiconductor element mounted on one side in a thickness direction of the base portion and having a first electrode disposed on the one side in the thickness direction and a second electrode disposed on the other side in the thickness direction, a second lead spaced apart from the base portion in a first direction orthogonal to the thickness direction, a first conductive member including a first portion bonded to the first electrode and a second portion bonded to the second lead and electrically connected to the first electrode and the second lead, a first bonding layer interposed between, and bonded to the base portion and the second electrode, and a second bonding layer interposed between, and bonded to the first electrode and the first portion. The first bonding layer includes a sintered metal.

An IC includes a substrate including circuitry configured to provide a receiver or a transmitter circuit. A metal stack is over the semiconductor surface including a top metal layer and a plurality of lower metal layers. An isolation capacitor includes the top metal layer as a top plate that is electrically connected to a first node; and a top dielectric layer on the top plate with a top plate dielectric aperture. One of the plurality of lower metal layers provides a bottom plate that includes a plurality of spaced apart segments. A capacitor dielectric layer is between the top and bottom plate. The segments include a first segment electrically connected to a second node and at least a second segment electrically connected to a third node, with separation regions located between adjacent spaced apart segments. The top plate covers at least a portion of each of the separation regions.

An electronic device which can suppress peeling off and damaging of the bonding material is provided. The electronic device includes an electronic component, a mounting portion, and a bonding material. The electronic component has an element front surface and an element back surface separated in the z-direction. The mounting portion has a mounting surface opposed to the element back surface on which the electronic component is mounted. The bonding material bonds the electronic component to the mounting portion. The bonding material includes a base portion and a fillet portion. The base portion is held between the electronic component and the mounting portion in the z-direction. The fillet portion is connected to the base portion and is formed outside the electronic component when seen in the z-direction. The electronic component includes two element lateral surface and ridges. The ridges are intersections of the two element lateral surface and extend in the z-direction. The fillet portion includes a ridge cover portion which covers at least a part of the ridges.

Systems and methods plasma dicing are provided. The method includes forming a mask layer on a first surface of a wafer. The mask layer includes scribe lines and the wafer is diced along the scribe lines. The method also includes forming a die attach layer of a photo patternable material on a second surface of the wafer opposite the first surface. The method further includes patterning the die attach layer to form a number of openings in the die attach layer in a predetermined pattern. The method yet further includes applying a dicing tape to the die attach layer. The method includes dicing the wafer along the scribe lines to form dies of a plurality of dies supported by the dicing tape, a die of the plurality of dies having the die attach layer of the photo patternable material.

A semiconductor package includes a metallic substrate, the metallic substrate including a roughened surface, a semiconductor die including bond pads, and an adhesive between the roughened surface of a topside of the metallic substrate and the semiconductor die, therein bonding the semiconductor die to the metallic substrate. The adhesive includes a resin. The metallic substrate further includes a groove about a perimeter of the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic substrate. The groove straddles the topside and a sidewall of the metallic substrate.

According to one embodiment, a semiconductor device includes a semiconductor element provided on a first surface of a lead frame; a package member provided on the lead frame and on the semiconductor element and having a first concave part; and a first terminal provided in the first concave part and extending in a first direction that is parallel to the first surface of the lead frame. The first concave part has a concave shape having a first length in the first direction, a second length in a second direction perpendicular to the first surface of the lead frame, and a third length in a third direction perpendicular to the first direction and the second direction. The third length is shorter than a length of the package member in the third direction.

A semiconductor device includes a first die pad, a first semiconductor element, a first lead, a first conductive member, and a sealing resin. The first conductive member is conductively bonded to the first semiconductor element and the first lead. The first die pad, the first semiconductor element, and the first conductive member are covered with the sealing resin. The first lead protrudes from the first side surface of the sealing resin. The first distance D1, the second distance D2, and the third distance D3 satisfy the relationship D1>D2D3. In the first direction z, the first conductive member is located between the first mounting surface of the first die pad and the top surface of the sealing resin.

According to one embodiment, a semiconductor device includes the following structure. The semiconductor chip is provided between first and second conductors. A joint component is provided between the chip and the second conductor. The thin film is provided on the second conductor and contains a material different from a material of the joint component. The second conductor includes first, second and third plates. The first plate extends in a first direction along a first surface of the chip and is connected to the chip via the joint component. The second plate extends from the first plate obliquely with respect to the first direction. The third plate extends from the second plate in the first direction. The thin film is arranged on a surface of the second plate continuous from a surface on which the joint component is provided.

A semiconductor device includes a semiconductor element having a first electrode and a second electrode, a first conductive member being located on a first side in a thickness direction with respect to the first electrode and having a first reverse surface to face a second side in the thickness direction, a second conductive member being located on the first side in the thickness direction with respect to the second electrode and having a second reverse surface to face the second side in the thickness direction, a first conductive bonding material interposed between the first electrode and the first reverse surface and bonded to the first electrode and the first conductive member, and a second conductive bonding material interposed between the second electrode and the second reverse surface and bonded to the second electrode and the second conductive member. An area of the second reverse surface is smaller than an area of the first reverse surface. A distance between the second electrode and the second reverse surface in the thickness direction is smaller than a distance between the first electrode and the first reverse surface in the thickness direction.