The present disclosure provides a chip package device. An example chip package device includes: at least one connection pad on a first surface of the chip; at least one pillar extending from, and in contact with, the pad; the pillar being formed in an alloy of a first element and of a second element, a melting temperature of the alloy being greater than a melting temperature of at least one of the first and second elements and greater than 260 C.

A semiconductor package and a manufacturing method thereof are described. The semiconductor package includes a package having dies encapsulated by an encapsulant, a redistribution circuit structure, first and second modules and affixing blocks. The redistribution circuit structure is disposed on the package. The first and second modules are disposed on and respectively electrically connected to the redistribution circuit structure by first and second connectors disposed there-between. The first and second modules are adjacent to each other and disposed side by side on the redistribution circuit structure. The affixing blocks are disposed on the redistribution circuit structure and between the first and second modules and the redistribution circuit structure. The affixing blocks include first footing portions located below the first module, second footing portions located below the second module, and exposed portions exposed from the first and second modules. The affixing blocks join the first and second modules to the redistribution circuit structure.

The present invention relates to the technical field of chip fixtures. Disclosed is a chip mounting fixture, comprising: a fixture body, wherein the fixture body is provided with chip slots which are uniformly distributed in an array and are used for accommodating chips, recessed wire slots are formed at the chip slots, and the wire slots extend to the outer sides of the chip slots. The present invention facilitates taking out a processed chip product, and the operation mode is convenient.

Provided is a non-electroconductive flux capable of enhancing productivity and impact resistance of a connected structure to be obtained and suppressing occurrence of solder flash. The non-electroconductive flux according to the present invention contains an epoxy compound, an acid anhydride curing agent, and an organophosphorus compound.

A device structure may be provided by: forming semiconductor devices and metal interconnect structures formed within dielectric material layers over a semiconductor substrate; forming metal pads in a topmost layer of the dielectric material layers; forming a passivation layer stack including a first dielectric diffusion barrier layer, a silicate glass layer, a second dielectric diffusion barrier layer, and a polymer layer; forming openings through the passivation layer stack over the metal pads; forming die bump structures on the metal pads; and dicing a wafer including the passivation layer stack, the dielectric material layers, and the semiconductor substrate along dicing channels into a plurality of semiconductor dies.

A package structure includes at least one integrated circuit component, an insulating encapsulation, and a redistribution structure. The at least one integrated circuit component includes a semiconductor substrate, an interconnection structure disposed on the semiconductor substrate, and signal terminals and power terminals located on and electrically connecting to the interconnection structure. The interconnection structure is located between the semiconductor substrate and the signal terminals and between the semiconductor substrate and the power terminals, and where a size of the signal terminals is less than a size of the power terminals. The insulating encapsulation encapsulates the at least one integrated circuit component. The redistribution structure is located on the insulating encapsulation and electrically connected to the at least one integrated circuit component.

Multi-die composite packages including directly bonded IC die and at least one electro-thermo-mechanical die (ETMD). An ETMD is distinguished from an active IC die as an ETMD is a passive die lacking any semiconductor devices, such as transistors. In exemplary embodiments, an ETMD includes a substrate, which may be a crystalline semiconductor material, for example, and one or more through substrate vias (TSVs) passing through a thickness of the substrate. The TSVs may enable a ETMD to electrically interconnect an (active) IC die of a composite package to another IC die of the package or to a package host.

According to one embodiment, a semiconductor device includes a substrate, at least one semiconductor part, and a non-semiconductor part. The substrate has a first face and a second face on a side opposite to that of the first face, and has a first linear expansion coefficient. The at least one semiconductor part is disposed on a first region of the first face, and has a second linear expansion coefficient that is smaller than the first linear expansion coefficient. The non-semiconductor part is disposed on a second region of the first face, on which no semiconductor part is disposed, and has a third linear expansion coefficient that is greater than the first linear expansion coefficient.

In an embodiment a method includes providing a carrier having an electronic semiconductor chip arranged on the carrier, providing a substrate having a functional layer arranged on the substrate, arranging the substrate over the carrier such that the functional layer faces toward the electronic semiconductor chip, and pressing the substrate onto the carrier, wherein the functional layer is pressed onto the electronic semiconductor chip so that the electronic semiconductor chip is pressed onto the carrier and connected to the carrier, and wherein the functional layer is deformed in response to pressing the electronic semiconductor chip.

A semiconductor manufacturing apparatus includes a flux container defining an accommodation space, the accommodation space configured to accommodate flux, a head tool configured to pick up and position a semiconductor device, semiconductor device including a connection terminal, and a vibration generator configured to apply vibrations to the flux container.