A package structure includes a package substrate. Numerous leads penetrate the package substrate. A top plate is disposed on the package substrate. An extension component extends from the top plate to the package substrate. Four side plates are disposed between the package substrate and the top plate. A die is disposed on the package substrate. The die includes a first surface and a second surface, and the first surface and the second surface are opposite. The extension component is bonded to the first surface of the die through a thermal conductive adhesive. Numerous conductive terminals are disposed on the die and exposed through the first surface. Numerous wires are disposed on the package substrate. Each wire is connected to one of the leads and one of the conductive terminals.

A power module includes: a first substrate having an outer surface and an inner surface; a semiconductor die coupled to the inner surface of the first substrate; a second substrate having an outer surface and an inner surface, the semiconductor die being coupled to the inner surface of the second substrate; and a flex circuit coupled to the semiconductor die.

A temperature-sensor assembly comprising at least one temperature sensor and at least one supply line, wherein the temperature sensor has at least one electrically insulating substrate with an upper side and an underside, wherein a temperature-sensor structure with at least one sensor-contact surface is formed at least on parts of the upper side, wherein the supply line has at least one supply-line contact surface, wherein the supply-line contact surface is connected to the sensor-contact surface at least in part by means of a first sinter layer.

There is provided a semiconductor device 1, comprising: a housing comprising a housing electrode 4; and at least one semiconductor chip 20 arranged within the housing; wherein the housing electrode 4 comprises a deformable portion 15, and the deformable portion 15 is configured to deform when a pressure difference between an interior and an exterior of the housing exceeds a threshold differential pressure or a temperature at the deformable portion exceeds a threshold temperature, so as to transform the housing from a hermetically sealed housing to an open housing in fluid communication with the exterior.

A capacitor component includes a support member; capacitance laminates laminated on one surface of the support member; at least one insulating layer disposed between the capacitance laminates; and a plurality of through structures each penetrating through at least one of the capacitance laminates. Each of the capacitance laminates includes a first electrode layer, a second electrode layer, and a dielectric layer disposed between the first and second electrode layers. One of the plurality of through structures includes a connection conductive pillar connected between first electrode layers of the capacitance laminates. Another of the plurality of through structures includes a first conductive pillar connected to a first electrode layer of one of the capacitance laminates, a dielectric through portion surrounding the first conductive pillar; and a through connection portion surrounding the dielectric through portion and connecting second electrode layers of the capacitance laminates to each other.

A wireless transistor outline (TO) package structure includes a carrying module, a chip and a lead frame both mounted on the carrying module, a sheet-like bonding module mounted on the chip and the lead frame in a flip chip manner, and an encapsulant that covers the above components therein. A connection pad of the chip and a connection segment of the lead frame are coplanar with each other. The sheet-like bonding module includes a ceramic substrate and a plurality of circuit layers that are stacked and formed on the ceramic substrate in a direct plated copper (DPC) manner. Areas of the circuit layers gradually decrease in a direction away from the ceramic substrate, and thicknesses of the circuit layers gradually increase in the same direction. The circuit layer arranged away from the ceramic substrate connects the connection pad and the connection segment for establishing an electrical connection therebetween.

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

A display module is disclosed. The display module includes a substrate; a plurality of inorganic light-emitting diodes provided in a plurality of mounting grooves formed in the substrate, the plurality of inorganic light-emitting diodes including an inorganic light-emitting diode that has a first chip electrode and a second chip electrode; a first substrate electrode pad and a second substrate electrode pad provided at a bottom surface of a mounting groove from among the plurality of mounting grooves, the first substrate electrode pad being electrically coupled to the first chip electrode and the second substrate electrode pad being electrically coupled to the second chip electrode; and a third substrate electrode pad and a fourth substrate electrode pad provided around the mounting groove.

A multi-chip package includes: an interposer; a first IC chip over the interposer, wherein the first IC chip is configured to be programmed to perform a logic operation, comprising a NVM cell configured to store a resulting value of a look-up table, a sense amplifier having an input data associated with the resulting value from the NVM cell and an output data associated with the first input data of the sense amplifier, and a logic circuit comprising a SRAM cell configured to store data associated with the output data of the sense amplifier, and a multiplexer comprising a first set of input points for a first input data set for the logic operation and a second set of input points for a second input data set having data associated with the data stored in the SRAM cell, wherein the multiplexer is configured to select, in accordance with the first input data set, an input data from the second input data set as an output data for the logic operation; and a second IC chip over the interposer, wherein the first IC chip is configured to pass data associated with the output data for the logic operation to the second IC chip through the interposer.

A light emitting module including a module substrate and a plurality of element structure bodies disposed on the module substrate. Each element structure body of the plurality of element structure bodies includes a submount substrate, a light emitting element disposed on the submount substrate, a light transmitting member disposed on the light emitting element, and a first cover member covering a lateral face of the light emitting element on the submount substrate. The light emitting module further includes a second cover member covering lateral faces of adjacent element structure bodies of the plurality of element structure bodies. A distance between submount substrates of the adjacent element structure bodies ranges from 0.05 mm to 0.2 mm.