A semiconductor device includes: a semiconductor element; and a first conductor and a second conductor respectively joined to a first surface and a second surface of the semiconductor element via Sn-based solder, in which a Ni-based plated layer is formed on surfaces of the first conductor and the second conductor that oppose the Sn-based solder and on the first surface and the second surface of the semiconductor element, and an interface reaction inhibition layer made of (Cu, Ni).sub.6Sn.sub.5 and having a layer thickness of 1.2 to 4.0 m is formed at an interface between the Ni-based plated layer and the Sn-based solder.

Provided is a flux that can suppress the generation of voids when an indium alloy sheet is used to perform a continuous reflow under different temperature conditions. The present invention employs a flux that contains a rosin ester, an organic acid (A), and a solvent (S). The organic acid (A) includes a dimer acid (A1) that demonstrates a weight reduction rate of not more than 1 mass % in a thermogravimetric analysis in which the dimer acid is heated up to 260 C. at a temperature rising rate of 10 C./min. The solvent (S) includes a solvent (S1) that demonstrates the weight reduction rate of at least 99 mass % in a thermogravimetric analysis in which the solvent (S1) is heated up to 150 C. at a temperature rising rate of 6 C./min.

A method of repairing a display panel and a repaired display panel are provided. The display panel includes a panel substrate, a plurality of micro LEDs arranged on the panel substrate, and a molding member covering the plurality of micro LEDs. The molding member includes a first molding member and a second molding member disposed in a region surrounded by the first molding member. The second molding member has a composition or a shape different from that of the first molding member, and the second molding member surrounds at least one side surface of the plurality of micro LEDs.

The present disclosure discloses a method for manufacturing a color Micro LED display chip module, comprising preparing a Micro LED chip on a substrate, grinding and cutting the chip and then flip-bonding same on a driving basal plate, and peeling the substrate from the chip. Through fabricating a quantum dot hole site corresponding to a sub-pixel unit position of a chip on a transparent basal plate and filling a quantum dot light-color converter in the quantum dot hole site and depositing a quantum dot protective layer, a conversion device is fabricated independently on the transparent basal plate. Compared with processing a conversion layer on a substrate layer in the prior art, inverting a full-color quantum dot conversion device and then aligning and bonding same with the integrated monochrome Micro LED module base can improve the fabrication efficiency, eliminate the crosstalk between light and color in full-color Micro LED display.

A stencil mask and a stencil printing method are provided. The stencil mask includes: a non-reinforcement portion having a mask surface configured to contact a substrate surface of a substrate; and a reinforcement portion having a thickness greater than that of the non-reinforcement portion, wherein the reinforcement portion includes: an embossed surface for insertion into a cavity of the substrate and configured to contact a cavity bottom surface when the stencil mask is placed onto the substrate for stencil printing; and at least one first stencil window that allows the fluid material to flow through the reinforcement portion, wherein the at least one first stencil window is aligned with at least one printing region within the cavity when the stencil mask is placed onto the substrate for stencil printing.

A method for producing a molded electronic devices includes providing a first metallic frame including a plurality of die pads and a plurality of first connectors that hold the die pads in place. A vertical power semiconductor die is attached to each die pad. One or more second metallic frames are vertically aligned with the first metallic frame. Each second metallic frame includes a plurality of first contact pads and a plurality of second connectors that hold the first contact pads in place. Each of the first contact pads is attached to a load terminal of one of the vertical power semiconductor dies without any direct physical or electrical connection between the first metallic frame and the second metallic frame. The vertical power semiconductor dies are encapsulated in a mold compound. The first connectors and the second connectors are severed to yield individual molded electronic devices.

A semiconductor device includes: an insulated circuit substrate including a base plate, a resin layer on the base plate, and a circuit pattern on the resin layer; a semiconductor chip that is rectangular and is bonded to the circuit pattern such that a side edge of the semiconductor chip is spaced inwardly from an outer peripheral edge of the circuit pattern by a predetermined distance; a case on the resin layer and surrounds the circuit pattern and the semiconductor chip; and a sealing material that covers the insulated circuit substrate and semiconductor chip and is surrounded by the case. The predetermined distance and thickness of the circuit pattern are greater than or equal to 0.1 of a length of one side of the semiconductor chip. A peripheral region of the case and a peripheral region of the resin layer are connected to each other via an adhesive layer.

The purpose of this invention is to provide a semiconductor device that prevents defects in semiconductor elements caused by differences in thermal expansion and maintains low electrical resistance by directly or indirectly laminating an FeNi alloy metal layer onto the front-surface or back-surface electrodes of the semiconductor element. In this invention, an FeNi alloy metal layer is directly or indirectly applied on the surface electrodes of the semiconductor element, and the semiconductor element is connected to a conductor through the FeNi alloy metal layer. Depending on the application, the Ni content of the FeNi alloy metal layer is set within the range of 36% to 45% by weight, and the thickness of the FeNi alloy metal layer is set within the range of 2 m to 20 m.

A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

According to an embodiment, a ceramic copper circuit board in which the reliability of bonding with a bonding layer is improved is provided, and an insulating circuit board includes an insulating substrate and a conductor part bonded to at least one surface of the insulating substrate. In XPS analysis of a nitrogen amount at the conductor part surface, an average value of the nitrogen amount at any three locations is within a range of not less than 0 at % and not more than 50 at %. In XPS analysis of the oxygen amount at the conductor part surface, the average value of the three locations is favorably within the range of not less than 3 at % and not more than 30 at %. The ratio of the nitrogen amount to the oxygen amount is favorably not less than 0 and not more than 5.