Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, and the like, for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded without adhesive at the prepared bonding surfaces.

A carrier assembly for semiconductor device may include a first carrier attached to a front surface of a base wafer, the first carrier including a first stiffness reinforcement structure having a first surface facing the base wafer and a second surface opposite to the first surface and including a first adhesive member disposed between the first surface of the first reinforcement structure and the front surface of the base wafer; and a second carrier attached to the second surface of the first stiffness reinforcement structure, the second carrier including a second stiffness reinforcement structure having a first surface facing the base wafer and a second surface opposite to the first surface of the second stiffness reinforcement structure and including a second adhesive member disposed between the first stiffness reinforcement structure and the second stiffness reinforcement structure.

A method of preparing a structured substrate of interest including the following steps: providing a substrate of interest including a thin film, onto which a protective layer has been bonded by direct bonding, depositing a resin, and etching the thin film and a portion of the support substrate through openings in the resin, to form pads, bonding a temporary substrate to the substrate of interest, then separating them, whereby the protective layer is separated from the substrate of interest, the resin being removed prior to the bonding step or during the separation, the protective layer/thin film adhesion energy being lower than the temporary substrate/protective layer adhesion energy or than the resin/protective layer adhesion energy.

A polyimide precursor composition according to an exemplary embodiment includes an imide precursor having an organic group derived from a cyclic ether group-containing compound. A polyimide film formed using the polyimide precursor composition has improved heat resistance and mechanical properties, and has high absorbance in a wavelength range in an ultraviolet region.

A semiconductor wafer is diced along a plurality of dicing lines in a first direction and a second direction different from the first direction so that a chip is cut out from an effective area. The semiconductor water includes a film formation pattern. At least one dicing line included in the plurality of dicing lines is an on-pattern dicing line which overlaps the film formation pattern in its entire or partial length.

A wafer thinning tape and a preparation method thereof, and a wafer grinding method are provided. The wafer thinning tape includes a tape layer, a base film layer, and a conductive coating that are successively stacked, where the base film layer and the conductive coating constitute an antistatic base film; the raw materials of the tape layer include acrylic adhesive, curing agent, and antistatic agent, and the mass dosage of curing agent is 3%-4% that of the acrylic adhesive, and the mass dosage of antistatic agent is 1%-2% that of the acrylic adhesive; the base film layer is TPU film; the conductive coating is silver nanowire coating. The wafer thinning tape can be applied to wafer grinding, has excellent antistatic property, and can effectively inhibit the peeling static electricity; at the same time, it also has the advantages of peeling without residue and preventing water penetration.

A method includes preparing a protective film including a base film and a protective layer laminated on a surface of the base film, mounting the protective film on a semiconductor wafer having a rear surface attached to a dicing tape and a front surface positioned opposite to the rear surface, the protective layer being disposed on the front surface, irradiating the rear surface of the semiconductor wafer with a dicing laser, removing the base film of the protective film from the semiconductor wafer, dividing the semiconductor wafer into individual semiconductor chips, and removing the protective layer from the individual semiconductor chips.

A method of forming a semiconductor device includes the following steps. A die and a first through via aside the die are formed. An encapsulant is formed to encapsulate the die and the first through via, wherein the encapsulant is physically connected to a sidewall of the first through via and a sidewall of the die. A warpage controlling layer is formed over the encapsulant and the die. A first conductive connector is formed on the first through via to electrically connect to the first through via.

A method includes: forming an interposer die using a substrate, the interposer die including a plurality of conductive vias in the substrate; bonding the interposer die to a first redistribution layer (RDL); encapsulating the interposer die; forming a second RDL over the interposer die on a side opposite to the first RDL; bonding a first semiconductor die with one of the first RDL and the second RDL; and encapsulating the first semiconductor die.

A method for manufacturing an SiC semiconductor device includes a step of setting, on a main surface of an SiC wafer, a scheduled cutting line that demarcates a plurality of chip regions including a first chip region in which a functional device is formed and a second chip region in which a monitor pattern for performing process control of the first chip region is formed, a step of forming, on the main surface, a plurality of main surface electrodes respectively covering the chip regions such as to expose the scheduled cutting line and respectively forming a portion of the functional device and a portion of the monitor pattern, a step of irradiating laser light to the scheduled cutting line and forming a modified region, and a step of cleaving the SiC wafer with the modified region as a starting point.