A package includes a first direct bonded metal (DBM) substrate, a first semiconductor die disposed on a top surface of the first DBM substrate, a second DBM substrate disposed at a height above the first DBM substrate, and a second semiconductor die disposed on a top surface of the second DBM substrate. A wire bond is made between the first semiconductor die disposed on the top surface of the first DBM substrate and the second semiconductor die disposed on the top surface of the second DBM substrate.

A power semiconductor module includes a semiconductor board and a number of semiconductor chips attached to the semiconductor board. Each semiconductor chip has two power electrodes. An adapter board is attached to the semiconductor board above the semiconductor chips. The adapter board includes a terminal area for each semiconductor chip on a side facing away from the semiconductor board. The adapter board, in each terminal area, provides a power terminal for each power electrode of the semiconductor chip associated with the terminal area. Each power terminal is electrically connected via a respective vertical post below the terminal area with a respective semiconductor chip and each of the power terminals has at least two plug connectors. Jumper connectors interconnect the plug connectors for electrically connecting power electrodes of different semiconductor chips.

A semiconductor package includes a first layer including a semiconductor die embedded within a dielectric substrate, and a first set of metal pillars extending through the dielectric substrate, a second layer stacked on the first layer, the second layer including a metal trace patterned on the dielectric substrate of the first layer, a passive component including at least one capacitor or resistor electrically coupled to the metal trace, and a second set of metal pillars extending from the metal trace to an opposing side of the second layer, and a third layer stacked on the second layer, the third layer including at least one inductor electrically coupled to metal pillars of the second set of metal pillars.

A semiconductor device according to the present disclosure includes: an insulating substrate; a semiconductor element bonded to a surface on one side of the insulating substrate; and a heat sink bonded to a surface on the other side of the insulating substrate, wherein the heat sink has at least one groove in a surface on the other side thereof opposite a surface on the one side thereof to which the insulating substrate is bonded, and the at least one groove is not located in each of portions of the surface on the other side of the heat sink located on opposite sides in a length direction of the at least one groove or in a portion of the surface on the other side of the heat sink located on one side in the length direction of the at least one groove.

A lead frame connects a metal wiring and an electrode of a case. A seal material is filled in the case. The lead frame includes a first joint portion joined to the metal wiring, a second joint portion joined to the electrode, and a connection portion connecting the first joint portion and the second joint portion. The connection portion includes an inclined portion inclined with respect to the upper surface of the insulating substrate on a cross-section across an extension direction of the lead frame, a first non-inclined portion provided between the inclined portion and the first joint portion, and a second non-inclined portion provided between the inclined portion and the second joint portion. Slits are provided on both sides of the lead frame at a boundary of the first non-inclined portion and the inclined portion and a boundary of the second non-inclined portion and the inclined portion.

An electronic device package includes a frame, an electronic device mounted to the frame, surface-mount leads, and a gel at least partially filling a cavity between the electronic device and the frame. The electronic device includes electronic circuitry provided on an electronic device substrate, and the surface-mount leads are electrically connected to the electronic circuitry and extend laterally and outwardly from an outer perimeter of the frame. The gel in the cavity covers the electronic circuitry.

An electronic device includes a leadframe and a substrate assembly. The substrate assembly includes a leadframe attachment feature configured to attach to the leadframe. At least one metal layer is embedded in the substrate assembly, where the at least one metal layer has an exposed surface. A die is attached to the exposed surface of the at least one metal layer and a mold compound encapsulates the substrate assembly and the die.

In the first aspect of the present disclosure, there is provided a method of manufacturing a semiconductor device, including the steps of: providing a substrate; mounting a semiconductor die having a first die surface and a second die surface opposite to the first die surface, with the first die surface mounted to the substrate; mounting a spacer having a first spacer surface and a second spacer surface opposite to the first spacer surface, with the first spacer surface mounted on the second die surface; fusing bonding to the second spacer surface by using ultrasonic fusing.

An insulated metal substrate (1) for a power semiconductor device is specified, comprising a metal base (2), a dielectric layer (3) arranged on the metal base (2), an electrically conductive layer (4) arranged on the dielectric layer (3), and a reinforcement structure (5), wherein the reinforcement structure (5) is arranged in a peripheral region of the insulated metal substrate (1) at least partially surrounding a central region of the insulated metal substrate (1). Furthermore, a method for producing an insulated metal substrate is specified.

Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.