In a described example, an apparatus includes: a metal leadframe including a dielectric die support formed in a central portion of the leadframe, and having metal leads extending from the central portion, portions of the metal leads extending into the central portion contacted by the dielectric die support; die attach material over the dielectric die support; a semiconductor die mounted to the dielectric die support by the die attach material, the semiconductor die having bond pads on a device side surface facing away from the dielectric die support; electrical connections extending from the bond pads to metal leads of the leadframe; and mold compound covering the semiconductor die, the electrical connections, the dielectric die support, and portions of the metal leads, the mold compound forming a package body.

A multiple die package is described that has an embedded bridge to connect the dies. One example is a microelectronic package that includes a package substrate, a silicon bridge embedded in the substrate, a first interconnect having a first plurality of contacts at a first location of the silicon bridge, a second interconnect having a second plurality of contacts at a second location of the silicon bridge, a third interconnect having a third plurality of contacts at a third location of the silicon bridge, and an electrically conductive line in the silicon bridge connecting a contact of the first interconnect, a contact of the second interconnect, and a contact of the third interconnect each to each other.

Provided are a laminate and a package, which are capable of transporting and storing a mechanically weak anisotropically conductive member which is easily damaged. The laminate includes an anisotropically conductive member including an insulating base material that has electrical insulating properties and a plurality of conduction paths that penetrate in a thickness direction of the insulating base material and have a protruding portion which protrudes from at least one surface of the insulating base material, and an organic film disposed on at least one surface of two surfaces of the anisotropically conductive member facing each other in the thickness direction of the insulating base material. The organic film has a gas permeability of 2.310.sup.8 to 4.610.sup.9 ml/(m.sup.2.Math.day.Math.MPa).

Novel tools and techniques are provided for implementing mixed dielectric materials for improving signal integrity of integrated electronics packages or semiconductor packages. In various embodiments, a substrate for a semiconductor device includes: a first layer made of a first material; a second layer made of a second material; and a third layer disposed between the first and second layers, and that is made of a third material different from the first and second materials. In some cases, the first, second, and third layers each contains a plurality of gas-filled regions (e.g., but not limited to, an aerogel core of the third layer and/or polymer resin matrix embedded with hollow silica spheres or aerogel spheres of the first and second layers, or the like). Coaxial ground shields around signal lines in the substrate can be used to improve signal integrity. High dielectric constant lossy lines between signal lines can reduce crosstalk.

A package structure includes a first substrate, a second substrate disposed on the first substrate, a third substrate disposed on the second substrate, and multiple chips mounted on the third substrate. A second coefficient of thermal expansion (CTE) of the second substrate is less than a first CTE of the first substrate. The third substrate includes a first sub-substrate, a second sub-substrate in the same level with the first sub-substrate, a third sub-substrate in the same level with the first sub-substrate. A CTE of the first sub-substrate, a CTE of the second sub-substrate, and a CTE of the third sub-substrate are less than the second CTE of the second substrate.

A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.

A semiconductor structure includes an interposer including redistribution wiring interconnects and redistribution insulating layers; a first semiconductor die attached to the interposer through a first array of solder material portions; and a second semiconductor die attached to the interposer through a second array of solder material portions. The interposer includes at least one inductor structure located between an area of the first array of solder material portions and an area of the second array of solder material portions in a plan view and laterally encloses a respective area in the plan view.

A thermal substrate includes a multilayer film, a first conductive layer adhered to the first outer layer of the multilayer film and a second conductive layer adhered to the second outer layer of the multilayer film. The multilayer film includes a first outer layer including a first thermoplastic polyimide, a core layer including a polyimide and a second outer layer including a second thermoplastic polyimide. The multilayer film has a total thickness in a range of from 5 to 150 m, and the first outer layer, the core layer and the second outer layer each include a thermally conductive filler. The first conductive layer and the second conductive layer each have a thickness in a range of from 250 to 3000 m.

Semiconductor die assemblies with decomposable materials, and associated methods and systems are disclosed. In an embodiment, a semiconductor die assembly includes a memory controller die carrying one or more memory dies attached to its first side. The semiconductor die assembly also includes a biodegradable structure attached to its second side opposite to the first side. The biodegradable structure includes a conductive material and an insulating material, both of which are biodegradable and disintegrate in a wet process. The biodegradable structure can be configured to couple the memory controller die with an interface die. In this manner, when the biodegradable structure disintegrates (e.g., dissolve) in the wet process, the memory controller carrying the memory dies can be separated from the interface die to reclaim the memory controller with the memory dies and the interface die.

A semiconductor device includes a circuit substrate, a semiconductor package, connective terminals and supports. The circuit substrate has a first side and a second side opposite to the first side. The semiconductor package is connected to the first side of the circuit substrate. The connective terminals are located on the second side of the circuit substrate and are electrically connected to the semiconductor package via the circuit substrate. The supports are located on the second side of the circuit substrate beside the connective terminals. A material of the supports has a melting temperature higher than a melting temperature of the connective terminals.