A semiconductor device includes a semiconductor die having a die surface, in which the die surface includes a bond pad. A ball bond has a distal surface and flattened-disk shape extending from the distal surface and terminating in a proximal surface spaced apart from the distal surface. The distal surface is coupled to the bond pad and a channel extends a depth into the proximal surface surrounding a central portion of the proximal surface. A bond wire extending from the central portion of the proximal surface, in which the channel is spaced apart from and surrounds the bond wire.

Systems and apparatus are provided for a hybrid wire size diameter under one single die. For example, an apparatus can include a memory cell die, a plurality of signal pads under the memory cell die and a plurality of power pads under the memory cell die. Each bonding wire coupled to a respective one of the plurality of signal pads has a first wire size diameter and each bonding wire coupled to a respective one of the plurality of power pads has a second wire size diameter larger than the first wire size diameter.

Stacked semiconductor packages with features to mitigate trace exposer and associated systems and methods are disclosed herein. In some embodiments, the stacked semiconductor package includes a base substrate, a stack of dies carried by the base substrate, and a mold material deposited at least partially encapsulating the stack of dies. The base substrate can include an active surface and a back surface opposite the active surface. Further, the active surface can include one or more cuts into a peripheral portion of the active surface (e.g., stepped structures at the peripheral edges of the base substrate). The base substrate can also include a plurality of bond pads carried by the active surface over the peripheral portion. Still further, the mold material can fill each of the one or more cuts in the active surface, thereby insulating the bond pads from exposure at a sidewall of the stacked semiconductor package.

A semiconductor package includes a package substrate having substrate pads disposed in a first direction on one surface, a semiconductor chip having chip pads disposed in the first direction, and bonding wires connecting the chip pads and the substrate pads. The bonding wires include first and second bonding wires alternately connected to the substrate pads respectively, in the first direction, the first bonding wires are connected to the substrate pads at a first angle less than a right angle with respect to a direction of the semiconductor chip, the second bonding wires are connected to the substrate pads at a second angle less than the first angle with respect to the direction of the semiconductor chip and a position at which the first bonding wires contact the substrate pads is closer to the semiconductor chip than a position at which the second bonding wires contact the substrate pads is to the semiconductor chip.

A semiconductor device includes: a conductive portion; and a semiconductor element mounted on the conductive portion, wherein the conductive portion is made of a plating layer, wherein the conductive portion includes a mounting portion having a mounting surface on which the semiconductor element is mounted, and a terminal portion extending to an opposite side of the semiconductor element with respect to the mounting portion, wherein the mounting portion extends in a first direction along the mounting surface more than the terminal portion, and wherein the mounting portion and the terminal portion are integrally formed.

A semiconductor package includes a package substrate, a processor chip mounted on a first region of the package substrate, a plurality of memory chips mounted on a second region of the package substrate being spaced apart from the first region of the package substrate, a signal transmission device mounted on a third region of the package substrate between the first and second regions of the package substrate, and a plurality of first bonding wires connecting the plurality of memory chips to the signal transmission device. The signal transmission device includes upper pads connected to the plurality of first bonding wires, penetrating electrodes arranged in a main body portion of the signal transmission device and connected to the upper pads, and lower pads in a lower surface portion of the signal transmission device and connected to the penetrating electrodes and connected to the package substrate via bonding balls.

A semiconductor device includes: an insulated circuit substrate including a base plate, a resin layer on the base plate, and a circuit pattern on the resin layer; a semiconductor chip that is rectangular and is bonded to the circuit pattern such that a side edge of the semiconductor chip is spaced inwardly from an outer peripheral edge of the circuit pattern by a predetermined distance; a case on the resin layer and surrounds the circuit pattern and the semiconductor chip; and a sealing material that covers the insulated circuit substrate and semiconductor chip and is surrounded by the case. The predetermined distance and thickness of the circuit pattern are greater than or equal to 0.1 of a length of one side of the semiconductor chip. A peripheral region of the case and a peripheral region of the resin layer are connected to each other via an adhesive layer.

The invention provides improved techniques for bonding devices using copper-to-copper or other types of bonds. A substrate is cleaned to remove surface oxides and contaminants and then rinsed. The rinsed substrate is provided to coating unit where a protective coating is applied to the substrate. The protective coating may be applied by immersing the substrate in a bath or via chemical vapor deposition. In an aspect, the protective coating may be copper selective so that the protective coating is only applied to copper features of the substrate. The protective coating minimizes formation of oxides and other bond weakening forces that may form during bonding processes, such as bonding a copper wire to a copper bond pad of the substrate. In an aspect, an annealing process is used to cure the protective coating and remove small imperfections and other abnormalities in the protective coating prior to the bonding process.

A method includes removing an oxide layer from select areas of a surface of a metal structure of a lead frame to create openings that extend through the oxide layer to expose portions of the surface of the metal structure. The method further includes attaching a semiconductor die to the lead frame, performing an electrical connection process that electrically couples an exposed portion of the surface of the metal structure to a conductive feature of the semiconductor die, enclosing the semiconductor die in a package structure, and separating the electronic device from the lead frame. In one example, the openings are created by a laser ablation process. In another example, the openings are created by a chemical etch process using a mask. In another example, the openings are created by a plasma process.

A semiconductor package includes: a package substrate, a first stack structure disposed on the package substrate, the first stack structure including first semiconductor chips stacked and connected to each other by bonding wires, a second stack structure disposed on the first stack structure, and including second semiconductor chips stacked, the second stack structure having an overhang region protruding beyond an uppermost first semiconductor chip of the first stack structure among the first semiconductor chips, an adhesive member covering a lower surface of the second stack structure and adhered to a portion of upper surfaces of the first stack structure, and an encapsulant disposed on the package substrate and covering the first stack structure and the second stack structure, wherein at least a portion of the bonding wires are buried in the die adhesive film in the overhang region to support the second stack structure.